i386.h (IS_STACK_MODE): Enable for TARGET_MIX_SSE_I387.

	* config/i386/i386.h (IS_STACK_MODE): Enable for
	TARGET_MIX_SSE_I387.  Rewrite using X87_FLOAT_MODE_P and
	SSE_FLOAT_MODE_P macros.
	* config/i386/i386.c (ix86_preferred_reload_class): Use
	IS_STACK_MODE, INTEGER_CLASS_P and FLOAT_CLASS_P macros.  Cleanup
	regclass processing for CONST_DOUBLE_P.
	(ix86_preferred_output_reload_class): Use IS_STACK_MODE macro.
	(ix86_rtx_costs): Remove redundant TARGET_80387 check
	with IS_STACK_MODE macro.
	* config/i386/i386.md: Replace SSE_FLOAT_MODE_P (DFmode)
	with TARGET_SSE2.
	(*movdf_internal): Use IS_STACK_MODE macro.
	(*movsf_internal): Ditto.

From-SVN: r236607

4 files changed, 66 insertions, 52 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6091b69..92f25c7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,19 @@
+2016-05-23  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.h (IS_STACK_MODE): Enable for
+	TARGET_MIX_SSE_I387.  Rewrite using X87_FLOAT_MODE_P and
+	SSE_FLOAT_MODE_P macros.
+	* config/i386/i386.c (ix86_preferred_reload_class): Use
+	IS_STACK_MODE, INTEGER_CLASS_P and FLOAT_CLASS_P macros.  Cleanup
+	regclass processing for CONST_DOUBLE_P.
+	(ix86_preferred_output_reload_class): Use IS_STACK_MODE macro.
+	(ix86_rtx_costs): Remove redundant TARGET_80387 check
+	with IS_STACK_MODE macro.
+	* config/i386/i386.md: Replace SSE_FLOAT_MODE_P (DFmode)
+	with TARGET_SSE2.
+	(*movdf_internal): Use IS_STACK_MODE macro.
+	(*movsf_internal): Ditto.
+
 2016-05-23  Marc Glisse  <marc.glisse@inria.fr>
 
 	* match.pd (a * (1 << b), ~x & ~y, ~X ^ ~Y, (X ^ Y) ^ Y, ~ (-A),
@@ -143,7 +159,7 @@
 
 2016-05-20  Uros Bizjak  <ubizjak@gmail.com>
 
-	* gcc/config/i386/i386.c (ix86_rtx_costs) <case CONST_DOUBLE>:
+	* config/i386/i386.c (ix86_rtx_costs) <case CONST_DOUBLE>:
 	Use IS_STACK_MODE when calculating cost of standard 80387 constants.
 	Fallthru to CONST_VECTOR case to calculate cost of standard SSE
 	constants.
@@ -279,7 +295,7 @@
 
 2016-05-19  Sandra Loosemore  <sandra@codesourcery.com>
 
-	* config/i386/cygming.h (DWARF2_UNWIND_INFO): Allow 
+	* config/i386/cygming.h (DWARF2_UNWIND_INFO): Allow
 	--disable-sjlj-exceptions for TARGET_BI_ARCH to select DWARF-2 EH
 	for 32-bit mode and SEH for 64-bit.
 	* config/i386/mingw32.h (SHARED_LIBGCC_UNDEFS_SPEC): Handle
@@ -676,7 +692,7 @@
 
 2016-05-18  Kirill Yukhin  <kirill.yukhin@intel.com>
 
-	* gcc/config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static
+	* config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static
 	array to 128 chars.
 	(define_insn "*andnottf3"): Ditto.
 	(define_insn "*<code><mode>3"/any_logic): Ditto.
@@ -942,7 +958,7 @@
 
 2016-05-16  Wilco Dijkstra  <wdijkstr@arm.com>
 
-	 * gcc/config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3):
+	* config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3):
 	Split integer shifts into shift_reg and bfm.
 	(aarch64_lshr_sisd_or_int_<mode>3): Likewise.
 	(aarch64_ashr_sisd_or_int_<mode>3): Likewise.
@@ -1608,7 +1624,7 @@
 
 	PR tree-optimization/70786
 	* tree-chkp.c (chkp_find_bounds_1): Support WITH_SIZE_EXPR.
-	* gcc/calls.c (initialize_argument_information): Bind bounds
+	* calls.c (initialize_argument_information): Bind bounds
 	with corresponding args passed by reference.
 
 2016-05-10  Jakub Jelinek  <jakub@redhat.com>
@@ -4642,7 +4658,7 @@
 2016-04-21  Kirill Yukhin  <kirill.yukhin@intel.com>
 
 	PR target/70728
-	* gcc/config/i386/sse.md (define_insn "<shift_insn><mode>3<mask_name>"):
+	* config/i386/sse.md (define_insn "<shift_insn><mode>3<mask_name>"):
 	Extract AVX-512BW constraint from AVX.
 
 2016-04-21  Richard Biener  <rguenther@suse.de>
@@ -5904,7 +5920,7 @@
 	Fix the predicate "aarch64_simd_reg_or_zero" to correctly validate
 	the "Y" constraint (scalar FP 0.0 immediate).
 
-	* gcc/config/aarch64/predicates.md (aarch64_simd_reg_or_zero):
+	* config/aarch64/predicates.md (aarch64_simd_reg_or_zero):
 	Add the "const_double" to the list of operand constraints.
 
 2016-04-01  Jakub Jelinek  <jakub@redhat.com>
@@ -7177,7 +7193,7 @@
 	* config/arm/arm-cores.def (cortex-r8): New.
 	* config/arm/arm-tables.opt (cortex-r8): Regenerate.
 	* config/arm/arm-tune.md: Likewise.
-	* gcc/doc/invoke.texi: Add cortex-r8 to list of cpu values.
+	* doc/invoke.texi: Add cortex-r8 to list of cpu values.
 
 2016-03-07  Martin Sebor  <msebor@redhat.com>
 
@@ -7778,12 +7794,12 @@
 2016-02-26  Joel Sherrill  <joel@rtems.org>
 
 	* config.gcc: Add x86_64-*-rtems*.
-	* gcc/config/i386/rtems-64.h: New file.
+	* config/i386/rtems-64.h: New file.
 
 2016-02-26  Joel Sherrill  <joel@rtems.org>
 
 	* config.gcc: Add aarch64-*-rtems*.
-	* gcc/config/aarch64/rtems.h: New file.
+	* config/aarch64/rtems.h: New file.
 
 2016-02-26  Segher Boessenkool  <segher@kernel.crashing.org>
 
@@ -9523,7 +9539,7 @@
 
 2016-02-04  Victoria Stepanyan  <victoria.stepanyan@amd.com>
 
-	* gcc/config/i386/x86-tune.def: Disable default prefetching
+	* config/i386/x86-tune.def: Disable default prefetching
 	for -march=znver1.
 
 2016-02-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
@@ -11775,10 +11791,10 @@
 2016-01-14  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
 	* config/rs6000/rs6000-builtin.def: Revert 2016-01-13 change.
-	* gcc/config/rs6000/rs6000.c: Likewise.
-	* gcc/config/rs6000/rs6000.h: Likewise.
-	* gcc/config/rs6000/rs6000.md: Likewise.
-	* gcc/doc/extend.texi: Likewsie.
+	* config/rs6000/rs6000.c: Likewise.
+	* config/rs6000/rs6000.h: Likewise.
+	* config/rs6000/rs6000.md: Likewise.
+	* doc/extend.texi: Likewsie.
 
 2016-01-14  Jeff Law  <law@redhat.com>
 
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1cb88d6..c474bb5 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -43301,37 +43301,35 @@ ix86_preferred_reload_class (rtx x, reg_class_t regclass)
 	  || MAYBE_MASK_CLASS_P (regclass)))
     return NO_REGS;
 
-  /* Prefer SSE regs only, if we can use them for math.  */
-  if (TARGET_SSE_MATH && !TARGET_MIX_SSE_I387 && SSE_FLOAT_MODE_P (mode))
-    return SSE_CLASS_P (regclass) ? regclass : NO_REGS;
-
   /* Floating-point constants need more complex checks.  */
   if (CONST_DOUBLE_P (x))
     {
       /* General regs can load everything.  */
-      if (reg_class_subset_p (regclass, GENERAL_REGS))
+      if (INTEGER_CLASS_P (regclass))
         return regclass;
 
       /* Floats can load 0 and 1 plus some others.  Note that we eliminated
 	 zero above.  We only want to wind up preferring 80387 registers if
 	 we plan on doing computation with them.  */
-      if (TARGET_80387
+      if (IS_STACK_MODE (mode)
 	  && standard_80387_constant_p (x) > 0)
 	{
-	  /* Limit class to non-sse.  */
-	  if (regclass == FLOAT_SSE_REGS)
+	  /* Limit class to FP regs.  */
+	  if (FLOAT_CLASS_P (regclass))
 	    return FLOAT_REGS;
-	  if (regclass == FP_TOP_SSE_REGS)
+	  else if (regclass == FP_TOP_SSE_REGS)
 	    return FP_TOP_REG;
-	  if (regclass == FP_SECOND_SSE_REGS)
+	  else if (regclass == FP_SECOND_SSE_REGS)
 	    return FP_SECOND_REG;
-	  if (regclass == FLOAT_INT_REGS || regclass == FLOAT_REGS)
-	    return regclass;
 	}
 
       return NO_REGS;
     }
 
+  /* Prefer SSE regs only, if we can use them for math.  */
+  if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)
+    return SSE_CLASS_P (regclass) ? regclass : NO_REGS;
+
   /* Generally when we see PLUS here, it's the function invariant
      (plus soft-fp const_int).  Which can only be computed into general
      regs.  */
@@ -43363,10 +43361,10 @@ ix86_preferred_output_reload_class (rtx x, reg_class_t regclass)
      math on.  If we would like not to return a subset of CLASS, reject this
      alternative: if reload cannot do this, it will still use its choice.  */
   mode = GET_MODE (x);
-  if (TARGET_SSE_MATH && SSE_FLOAT_MODE_P (mode))
+  if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)
     return MAYBE_SSE_CLASS_P (regclass) ? ALL_SSE_REGS : NO_REGS;
 
-  if (X87_FLOAT_MODE_P (mode))
+  if (IS_STACK_MODE (mode))
     {
       if (regclass == FP_TOP_SSE_REGS)
 	return FP_TOP_REG;
@@ -44071,7 +44069,7 @@ ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
       return true;
 
     case CONST_DOUBLE:
-      if (TARGET_80387 && IS_STACK_MODE (mode))
+      if (IS_STACK_MODE (mode))
 	switch (standard_80387_constant_p (x))
 	  {
 	  case -1:
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index b70a8c6..92823ac 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -957,10 +957,10 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
 
 #define STACK_REGS
 
-#define IS_STACK_MODE(MODE)					\
-  (((MODE) == SFmode && !(TARGET_SSE && TARGET_SSE_MATH))	\
-   || ((MODE) == DFmode && !(TARGET_SSE2 && TARGET_SSE_MATH))	\
-   || (MODE) == XFmode)
+#define IS_STACK_MODE(MODE)				\
+  (X87_FLOAT_MODE_P (MODE)				\
+   && (!(SSE_FLOAT_MODE_P (MODE) && TARGET_SSE_MATH)	\
+       || TARGET_MIX_SSE_I387))
 
 /* Number of actual hardware registers.
    The hardware registers are assigned numbers for the compiler
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 933faf8..d20bbe4 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3276,7 +3276,7 @@
        || !CONST_DOUBLE_P (operands[1])
        || ((optimize_function_for_size_p (cfun)
 	    || (ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC))
-	   && ((!(TARGET_SSE2 && TARGET_SSE_MATH)
+	   && ((IS_STACK_MODE (DFmode)
 		&& standard_80387_constant_p (operands[1]) > 0)
 	       || (TARGET_SSE2 && TARGET_SSE_MATH
 		   && standard_sse_constant_p (operands[1], DFmode) == 1))
@@ -3478,9 +3478,9 @@
        || !CONST_DOUBLE_P (operands[1])
        || ((optimize_function_for_size_p (cfun)
 	    || (ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC))
-	   && ((!TARGET_SSE_MATH
+	   && ((IS_STACK_MODE (SFmode)
 		&& standard_80387_constant_p (operands[1]) > 0)
-	       || (TARGET_SSE_MATH
+	       || (TARGET_SSE && TARGET_SSE_MATH
 		   && standard_sse_constant_p (operands[1], SFmode) == 1)))
        || memory_operand (operands[0], SFmode)
        || !TARGET_HARD_SF_REGS)"
@@ -4197,13 +4197,13 @@
 (define_expand "extendsfdf2"
   [(set (match_operand:DF 0 "nonimm_ssenomem_operand")
         (float_extend:DF (match_operand:SF 1 "general_operand")))]
-  "TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)"
+  "TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
 {
   /* ??? Needed for compress_float_constant since all fp constants
      are TARGET_LEGITIMATE_CONSTANT_P.  */
   if (CONST_DOUBLE_P (operands[1]))
     {
-      if ((!SSE_FLOAT_MODE_P (DFmode) || TARGET_MIX_SSE_I387)
+      if ((!TARGET_SSE2 || TARGET_MIX_SSE_I387)
 	  && standard_80387_constant_p (operands[1]) > 0)
 	{
 	  operands[1] = simplify_const_unary_operation
@@ -4286,7 +4286,7 @@
   [(set (match_operand:DF 0 "nonimm_ssenomem_operand" "=f,m,v")
         (float_extend:DF
 	  (match_operand:SF 1 "nonimmediate_operand" "fm,f,vm")))]
-  "TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)"
+  "TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
 {
   switch (which_alternative)
     {
@@ -4306,7 +4306,7 @@
    (set_attr "mode" "SF,XF,DF")
    (set (attr "enabled")
      (if_then_else
-       (match_test ("SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH"))
+       (match_test ("TARGET_SSE2 && TARGET_SSE_MATH"))
        (if_then_else
 	 (eq_attr "alternative" "0,1")
 	 (symbol_ref "TARGET_MIX_SSE_I387")
@@ -4357,9 +4357,9 @@
   [(set (match_operand:SF 0 "nonimmediate_operand")
 	(float_truncate:SF
 	  (match_operand:DF 1 "nonimmediate_operand")))]
-  "TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)"
+  "TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
 {
-  if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH && !TARGET_MIX_SSE_I387)
+  if (TARGET_SSE2 && TARGET_SSE_MATH && !TARGET_MIX_SSE_I387)
     ;
   else if (flag_unsafe_math_optimizations)
     ;
@@ -4439,7 +4439,7 @@
   [(set (match_operand:SF 0 "nonimmediate_operand"   "=fm,v")
         (float_truncate:SF
           (match_operand:DF 1 "nonimmediate_operand" "f  ,vm")))]
-  "SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH"
+  "TARGET_SSE2 && TARGET_SSE_MATH"
 {
   switch (which_alternative)
     {
@@ -14859,7 +14859,7 @@
 (define_expand "asin<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "general_operand"))]
- "TARGET_USE_FANCY_MATH_387
+  "TARGET_USE_FANCY_MATH_387
    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
        || TARGET_MIX_SSE_I387)
    && flag_unsafe_math_optimizations"
@@ -14897,7 +14897,7 @@
 (define_expand "acos<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "general_operand"))]
- "TARGET_USE_FANCY_MATH_387
+  "TARGET_USE_FANCY_MATH_387
    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
        || TARGET_MIX_SSE_I387)
    && flag_unsafe_math_optimizations"
@@ -15251,7 +15251,7 @@
 (define_expand "exp<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "general_operand"))]
- "TARGET_USE_FANCY_MATH_387
+  "TARGET_USE_FANCY_MATH_387
    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
        || TARGET_MIX_SSE_I387)
    && flag_unsafe_math_optimizations"
@@ -15285,7 +15285,7 @@
 (define_expand "exp10<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "general_operand"))]
- "TARGET_USE_FANCY_MATH_387
+  "TARGET_USE_FANCY_MATH_387
    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
        || TARGET_MIX_SSE_I387)
    && flag_unsafe_math_optimizations"
@@ -15319,7 +15319,7 @@
 (define_expand "exp2<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "general_operand"))]
- "TARGET_USE_FANCY_MATH_387
+  "TARGET_USE_FANCY_MATH_387
    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
        || TARGET_MIX_SSE_I387)
    && flag_unsafe_math_optimizations"
@@ -15375,7 +15375,7 @@
 (define_expand "expm1<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "general_operand"))]
- "TARGET_USE_FANCY_MATH_387
+  "TARGET_USE_FANCY_MATH_387
    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
        || TARGET_MIX_SSE_I387)
    && flag_unsafe_math_optimizations"
@@ -15413,7 +15413,7 @@
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "general_operand"))
    (use (match_operand:SI 2 "register_operand"))]
- "TARGET_USE_FANCY_MATH_387
+  "TARGET_USE_FANCY_MATH_387
    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
        || TARGET_MIX_SSE_I387)
    && flag_unsafe_math_optimizations"
@@ -15447,7 +15447,7 @@
   [(use (match_operand:MODEF 0 "register_operand"))
    (use (match_operand:MODEF 1 "general_operand"))
    (use (match_operand:MODEF 2 "general_operand"))]
- "TARGET_USE_FANCY_MATH_387
+  "TARGET_USE_FANCY_MATH_387
    && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
        || TARGET_MIX_SSE_I387)
    && flag_unsafe_math_optimizations"