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| author | Uros Bizjak <uros@gcc.gnu.org> | 2012-04-30 19:12:42 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2012-04-30 19:12:42 +0200 |
| commit | f45d8c45899a033685b12cf621b339e0be4cd77a (patch) | |
| tree | b4a2b0e3b39a2d6b1964154e1da6439810870008 /gcc | |
| parent | 3efc29598a3bc89fd2012f7b354c6385f9a2185b (diff) | |
| download | gcc-f45d8c45899a033685b12cf621b339e0be4cd77a.zip gcc-f45d8c45899a033685b12cf621b339e0be4cd77a.tar.gz gcc-f45d8c45899a033685b12cf621b339e0be4cd77a.tar.bz2 | |
i386.md (and<mode>3): Change runtime operand mode checks to compile-time "mode == <MODE>mode" checks.
* config/i386/i386.md (and<mode>3): Change runtime operand mode checks
to compile-time "mode == <MODE>mode" checks.
(and splitter): Ditto.
From-SVN: r186993
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 25 |
2 files changed, 18 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ea032c1..5e7dadf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2012-04-30 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (and<mode>3): Change runtime operand mode checks + to compile-time "mode == <MODE>mode" checks. + (and splitter): Ditto. + 2012-04-30 Richard Henderson <rth@redhat.com> * config/arm/arm.md (UNSPEC_LL): New. @@ -40,7 +46,7 @@ * config/arm/arm-protos.h (ldm_stm_operation_p): New parameters. * config/arm/arm.c (ldm_stm_operation_p): New parameters. * config/arm/predicates.md (load_multiple_operation): Add arguments. - (store_multiple_operation): Likewise. + (store_multiple_operation): Likewise. 2012-04-30 Uros Bizjak <ubizjak@gmail.com> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c98efaa..9047a31 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -7695,7 +7695,7 @@ (match_operand:SWIM 2 "<general_szext_operand>")))] "" { - enum machine_mode mode = GET_MODE (operands[1]); + enum machine_mode mode = <MODE>mode; rtx (*insn) (rtx, rtx); if (CONST_INT_P (operands[2]) && REG_P (operands[0])) @@ -7710,30 +7710,28 @@ mode = QImode; } - if (mode == GET_MODE (operands[1])) + if (mode == <MODE>mode) { ix86_expand_binary_operator (AND, <MODE>mode, operands); DONE; } - operands[1] = gen_lowpart (mode, operands[1]); - - if (GET_MODE (operands[0]) == DImode) + if (<MODE>mode == DImode) insn = (mode == SImode) ? gen_zero_extendsidi2 : (mode == HImode) ? gen_zero_extendhidi2 : gen_zero_extendqidi2; - else if (GET_MODE (operands[0]) == SImode) + else if (<MODE>mode == SImode) insn = (mode == HImode) ? gen_zero_extendhisi2 : gen_zero_extendqisi2; - else if (GET_MODE (operands[0]) == HImode) + else if (<MODE>mode == HImode) insn = gen_zero_extendqihi2; else gcc_unreachable (); - emit_insn (insn (operands[0], operands[1])); + emit_insn (insn (operands[0], gen_lowpart (mode, operands[1]))); DONE; }) @@ -7884,9 +7882,7 @@ mode = QImode; } - operands[1] = gen_lowpart (mode, operands[1]); - - if (GET_MODE (operands[0]) == DImode) + if (<MODE>mode == DImode) insn = (mode == SImode) ? gen_zero_extendsidi2 : (mode == HImode) @@ -7894,14 +7890,15 @@ : gen_zero_extendqidi2; else { - /* Zero extend to SImode to avoid partial register stalls. */ - operands[0] = gen_lowpart (SImode, operands[0]); + if (<MODE>mode != SImode) + /* Zero extend to SImode to avoid partial register stalls. */ + operands[0] = gen_lowpart (SImode, operands[0]); insn = (mode == HImode) ? gen_zero_extendhisi2 : gen_zero_extendqisi2; } - emit_insn (insn (operands[0], operands[1])); + emit_insn (insn (operands[0], gen_lowpart (mode, operands[1]))); DONE; }) |