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| author | Richard Kenner <kenner@gcc.gnu.org> | 1993-08-06 16:10:43 -0400 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 1993-08-06 16:10:43 -0400 |
| commit | f4014bfd8fa936f2581024001c99e929f8382bc2 (patch) | |
| tree | 47041c2d512ab9c349990ec5b382e6086fc78fae /gcc | |
| parent | e6157ab48fca5f720b270566629a49d1553c9da1 (diff) | |
| download | gcc-f4014bfd8fa936f2581024001c99e929f8382bc2.zip gcc-f4014bfd8fa936f2581024001c99e929f8382bc2.tar.gz gcc-f4014bfd8fa936f2581024001c99e929f8382bc2.tar.bz2 | |
(reg_or_6bit_operand): New function.
From-SVN: r5088
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/alpha/alpha.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index ff5befb..146d6f5 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -81,6 +81,20 @@ reg_or_0_operand (op, mode) return op == const0_rtx || register_operand (op, mode); } +/* Return 1 if OP is a constant in the range of 0-63 (for a shift) or + any register. */ + +int +reg_or_6bit_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + return ((GET_CODE (op) == CONST_INT + && (unsigned HOST_WIDE_INT) INTVAL (op) < 64) + || register_operand (op, mode)); +} + + /* Return 1 if OP is an 8-bit constant or any register. */ int |