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author | Uros Bizjak <uros@gcc.gnu.org> | 2017-07-23 12:28:26 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2017-07-23 12:28:26 +0200 |
commit | f36dda3b640088390c182eae1a44f07d1041eb27 (patch) | |
tree | d3edad4ade9231b06e6ec6b2f60db020220c4d08 /gcc | |
parent | 4a15d84228ee29d55cd011094f82c8d4fa9a5a76 (diff) | |
download | gcc-f36dda3b640088390c182eae1a44f07d1041eb27.zip gcc-f36dda3b640088390c182eae1a44f07d1041eb27.tar.gz gcc-f36dda3b640088390c182eae1a44f07d1041eb27.tar.bz2 |
re PR target/80569 (i686: "shrx" instruction generated in 16-bit mode)
PR target/80569
* config/i386/i386.c (ix86_option_override_internal): Disable
BMI, BMI2 and TBM instructions for -m16.
testsuite/ChangeLog:
PR target/80569
* gcc.target/i386/pr80569.c: New test.
From-SVN: r250459
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 22 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 6 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr80569.c | 9 |
4 files changed, 34 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8ec7a79..4554109 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-07-23 Uros Bizjak <ubizjak@gmail.com> + + PR target/80569 + * config/i386/i386.c (ix86_option_override_internal): Disable + BMI, BMI2 and TBM instructions for -m16. + 2017-07-21 Carl Love <cel@us.ibm.com> * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add @@ -384,10 +390,10 @@ 2017-07-18 Robin Dapp <rdapp@linux.vnet.ibm.com> - * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Remove + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Remove body_cost_vec from _vect_peel_extended_info. (vect_peeling_hash_get_lowest_cost): Do not set body_cost_vec. - (vect_peeling_hash_choose_best_peeling): Remove body_cost_vec and + (vect_peeling_hash_choose_best_peeling): Remove body_cost_vec and npeel. 2017-07-18 Bin Cheng <bin.cheng@arm.com> @@ -431,7 +437,7 @@ 2017-07-17 Yury Gribov <tetra2005@gmail.com> - * tree-vrp.c (compare_assert_loc): Fix comparison function + * tree-vrp.c (compare_assert_loc): Fix comparison function to return predictable results. 2017-07-17 Claudiu Zissulescu <claziss@synopsys.com> @@ -3422,11 +3428,11 @@ 2017-06-27 Jerome Lambourg <lambourg@adacore.com> * config/vxworks.h (VXWORKS_LIBS_RTP): Alternative definition for - 64bit configurations. - (PTR_DIFF_TYPE): Alternative definition for TARGET_LP64. - (SIZE_TYPE): Likewise. - * config/vxworks.c (vxworks_emutls_var_fields): Use - long_unsigned_type_node instead of unsigned_type_node as the offset + 64bit configurations. + (PTR_DIFF_TYPE): Alternative definition for TARGET_LP64. + (SIZE_TYPE): Likewise. + * config/vxworks.c (vxworks_emutls_var_fields): Use + long_unsigned_type_node instead of unsigned_type_node as the offset field type, which is "pointer" mode in emutls.c. 2017-06-27 Jakub Jelinek <jakub@redhat.com> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index ca29135..b7ef554 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -6284,6 +6284,12 @@ ix86_option_override_internal (bool main_args_p, opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit; + /* Disable BMI, BMI2 and TBM instructions for -m16. */ + if (TARGET_16BIT_P(opts->x_ix86_isa_flags)) + opts->x_ix86_isa_flags + &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM) + & ~opts->x_ix86_isa_flags_explicit); + /* Validate -mpreferred-stack-boundary= value or default it to PREFERRED_STACK_BOUNDARY_DEFAULT. */ ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b36cd5e..0263235 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-07-23 Uros Bizjak <ubizjak@gmail.com> + + PR target/80569 + * gcc.target/i386/pr80569.c: New test. + 2017-07-21 Carl Love <cel@us.ibm.com> * gcc.target/powerpc/builtins-2.c (vmulosh, vmulouh, vmulesh, diff --git a/gcc/testsuite/gcc.target/i386/pr80569.c b/gcc/testsuite/gcc.target/i386/pr80569.c new file mode 100644 index 0000000..8e11c40 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr80569.c @@ -0,0 +1,9 @@ +/* PR target/80569 */ +/* { dg-do assemble } */ +/* { dg-options "-O2 -m16 -march=haswell" } */ + +void load_kernel(void *setup_addr) +{ + unsigned int seg = (unsigned int)setup_addr >> 4; + asm("movl %0, %%es" : : "r"(seg)); +} |