i386: Fix mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi peephole2 [PR112526]

The following testcase is miscompiled on x86_64 since PR110551 r14-4968
commit.  That commit added 2 peephole2s, one for
mov imm,%rXX; mov %rYY,%rax; mulq %rXX -> mov imm,%rax; mulq %rYY
which I believe is ok, and another one for
mov imm,%rXX; mov %rYY,%rdx; mulx %rXX, %rZZ, %rWW -> mov imm,%rdx; mulx %rYY, %rZZ, %rWW
which is wrong.  Both peephole2s verify that %rXX above is dead at
the end of the pattern, by checking if %rXX is either one of the
registers overwritten in the multiplication (%rdx:%rax in the first
case, the 2 destination registers of mulx in the latter case), because
we no longer set %rXX to that immediate (we set %rax resp. %rdx to it
instead) when the peephole2 replaces it.  But, we also need to ensure
that the other register previously set to the value of %rYY and newly
to imm isn't used after the multiplication, and neither of the peephole2s
does that.  Now, for the first one (at least assuming in the % pattern
the matching operand (i.e. hardcoded %rax resp. %rdx) after RA will always go
first) I think it is always the case, because operands[2] if it must be %rax
register will be overwritten by mulq writing to %rdx:%rax.  But in the
second case, there is no reason why %rdx couldn't be used after the pattern,
and if it is (like in the testcase), we can't make those changes.
So, the patch checks similarly to operands[0] that operands[2] (which ought
to be %rdx if RA puts the % match_dup operand first and nothing swaps it
afterwards) is either the same register as one of the destination registers
of mulx or dies at the end of the multiplication.

2023-11-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/112526
	* config/i386/i386.md
	(mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi):
	Verify in define_peephole2 that operands[2] dies or is overwritten
	at the end of multiplication.

	* gcc.target/i386/bmi2-pr112526.c: New test.

2 files changed, 31 insertions, 1 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 26cdb21..a364c43 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -9997,7 +9997,10 @@
    && REGNO (operands[0]) != REGNO (operands[3])
    && (REGNO (operands[0]) == REGNO (operands[4])
        || REGNO (operands[0]) == REGNO (operands[5])
-       || peep2_reg_dead_p (3, operands[0]))"
+       || peep2_reg_dead_p (3, operands[0]))
+   && (REGNO (operands[2]) == REGNO (operands[4])
+       || REGNO (operands[2]) == REGNO (operands[5])
+       || peep2_reg_dead_p (3, operands[2]))"
   [(set (match_dup 2) (match_dup 1))
    (parallel [(set (match_dup 4)
 		   (mult:DWIH (match_dup 2) (match_dup 3)))
diff --git a/gcc/testsuite/gcc.target/i386/bmi2-pr112526.c b/gcc/testsuite/gcc.target/i386/bmi2-pr112526.c
new file mode 100644
index 0000000..7a3c6f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/bmi2-pr112526.c
@@ -0,0 +1,27 @@
+/* PR target/112526 */
+/* { dg-do run { target { bmi2 && int128 } } } */
+/* { dg-options "-O2 -mbmi2" } */
+
+#include "bmi2-check.h"
+
+__attribute__((noipa)) void
+foo (unsigned long x, unsigned __int128 *y, unsigned long z, unsigned long *w)
+{
+  register unsigned long a __asm ("%r10") = x + z;
+  register unsigned __int128 b __asm ("%r8") = ((unsigned __int128) a) * 257342423UL;
+  asm volatile ("" : "+r" (b));
+  asm volatile ("" : "+d" (a));
+  *y = b;
+  *w = a;
+}
+
+static void
+bmi2_test ()
+{
+  unsigned __int128 y;
+  unsigned long w;
+  foo (10268318293806702989UL, &y, 4702524958196331333UL, &w);
+  if (y != ((((unsigned __int128) 0xc72d2c9UL) << 64) | 0x9586adfdc95b225eUL)
+      || w != 14970843252003034322UL)
+    abort ();
+}