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| author | Adam Nemet <anemet@caviumnetworks.com> | 2009-05-13 21:52:56 +0000 |
|---|---|---|
| committer | Adam Nemet <nemet@gcc.gnu.org> | 2009-05-13 21:52:56 +0000 |
| commit | f06257d36aac7da75b3eaf7d06cf138a303977cb (patch) | |
| tree | 4045f7b4f601e8dea5079ee5687833505daf4a5e /gcc | |
| parent | c7bda60ed4326255824b4a083a5ce793ac4e56d8 (diff) | |
| download | gcc-f06257d36aac7da75b3eaf7d06cf138a303977cb.zip gcc-f06257d36aac7da75b3eaf7d06cf138a303977cb.tar.gz gcc-f06257d36aac7da75b3eaf7d06cf138a303977cb.tar.bz2 | |
mips.md (store): Add attributes for QI and HI.
* config/mips/mips.md (store): Add attributes for QI and HI.
Update comment.
(truncdisi2, truncdihi2, truncdiqi2): Merge these into ...
(truncdi<mode>2): ... this new pattern.
From-SVN: r147503
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 33 |
2 files changed, 14 insertions, 26 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 141762d..c2da140 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2009-05-13 Adam Nemet <anemet@caviumnetworks.com> + + * config/mips/mips.md (store): Add attributes for QI and HI. + Update comment. + (truncdisi2, truncdihi2, truncdiqi2): Merge these into ... + (truncdi<mode>2): ... this new pattern. + 2009-05-13 Brad Hards <bradh@kde.org> * Makefile.in (TEXI_GCCINT_FILES): Add plugins.texi. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 713bd83..3b44a84 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -727,9 +727,10 @@ ;; This attributes gives the mode mask of a SHORT. (define_mode_attr mask [(QI "0x00ff") (HI "0xffff")]) -;; Mode attributes for GPR loads and stores. +;; Mode attributes for GPR loads. (define_mode_attr load [(SI "lw") (DI "ld")]) -(define_mode_attr store [(SI "sw") (DI "sd")]) +;; Instruction names for stores. +(define_mode_attr store [(QI "sb") (HI "sh") (SI "sw") (DI "sd")]) ;; Similarly for MIPS IV indexed FPR loads and stores. (define_mode_attr loadx [(SF "lwxc1") (DF "ldxc1") (V2SF "ldxc1")]) @@ -2692,33 +2693,13 @@ ;; ;; Step A needs a real instruction but step B does not. -(define_insn "truncdisi2" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,m") - (truncate:SI (match_operand:DI 1 "register_operand" "d,d")))] +(define_insn "truncdi<mode>2" + [(set (match_operand:SUBDI 0 "nonimmediate_operand" "=d,m") + (truncate:SUBDI (match_operand:DI 1 "register_operand" "d,d")))] "TARGET_64BIT" "@ sll\t%0,%1,0 - sw\t%1,%0" - [(set_attr "move_type" "sll0,store") - (set_attr "mode" "SI")]) - -(define_insn "truncdihi2" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,m") - (truncate:HI (match_operand:DI 1 "register_operand" "d,d")))] - "TARGET_64BIT" - "@ - sll\t%0,%1,0 - sh\t%1,%0" - [(set_attr "move_type" "sll0,store") - (set_attr "mode" "SI")]) - -(define_insn "truncdiqi2" - [(set (match_operand:QI 0 "nonimmediate_operand" "=d,m") - (truncate:QI (match_operand:DI 1 "register_operand" "d,d")))] - "TARGET_64BIT" - "@ - sll\t%0,%1,0 - sb\t%1,%0" + <store>\t%1,%0" [(set_attr "move_type" "sll0,store") (set_attr "mode" "SI")]) |