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| author | Hale Wang <hale.wang@arm.com> | 2015-04-22 07:21:35 +0000 |
|---|---|---|
| committer | Xuepeng Guo <xguo@gcc.gnu.org> | 2015-04-22 07:21:35 +0000 |
| commit | eefe4e49f4727e475e11e29c45b31736cc1963f6 (patch) | |
| tree | 142bbcbbb9752a567f6fbc46932fb24bc1b4cb76 /gcc | |
| parent | 5a33401eabe208e602a94bbb1921ec1b19b1f185 (diff) | |
| download | gcc-eefe4e49f4727e475e11e29c45b31736cc1963f6.zip gcc-eefe4e49f4727e475e11e29c45b31736cc1963f6.tar.gz gcc-eefe4e49f4727e475e11e29c45b31736cc1963f6.tar.bz2 | |
re PR rtl-optimization/64818 (User specified register don't work correctly in inline-asm operands.)
gcc/ChangeLog:
2015-04-22 Hale Wang <hale.wang@arm.com>
Terry Guo <terry.guo@arm.com>
PR rtl-optimization/64818
* combine.c (can_combine_p): Don't combine user-specified
register if it is in an asm input.
gcc/testsuite/ChangeLog
2015-04-22 Hale Wang <hale.wang@arm.com>
Terry Guo <terry.guo@arm.com>
PR rtl-optimization/64818
* gcc.target/arm/pr64818.c: New test.
Co-Authored-By: Terry Guo <terry.guo@arm.com>
From-SVN: r222306
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/combine.c | 9 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/pr64818.c | 30 |
4 files changed, 52 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6959c06..2755252 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-04-22 Hale Wang <hale.wang@arm.com> + Terry Guo <terry.guo@arm.com> + + PR rtl-optimization/64818 + * combine.c (can_combine_p): Don't combine user-specified + register if it is in an asm input. + 2015-04-21 Jan Hubicka <hubicka@ucw.cz> PR ipa/65076 diff --git a/gcc/combine.c b/gcc/combine.c index 6f0007a..6cd55dd 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1910,6 +1910,15 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED, set = expand_field_assignment (set); src = SET_SRC (set), dest = SET_DEST (set); + /* Do not eliminate user-specified register if it is in an + asm input because we may break the register asm usage defined + in GCC manual if allow to do so. + Be aware that this may cover more cases than we expect but this + should be harmless. */ + if (REG_P (dest) && REG_USERVAR_P (dest) && HARD_REGISTER_P (dest) + && extract_asm_operands (PATTERN (i3))) + return 0; + /* Don't eliminate a store in the stack pointer. */ if (dest == stack_pointer_rtx /* Don't combine with an insn that sets a register to itself if it has diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8b2b177..fd3f700 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2015-04-22 Hale Wang <hale.wang@arm.com> + Terry Guo <terry.guo@arm.com> + + PR rtl-optimization/64818 + * gcc.target/arm/pr64818.c: New test. + 2015-04-21 Jan Hubicka <hubicka@ucw.cz> PR ipa/65076 diff --git a/gcc/testsuite/gcc.target/arm/pr64818.c b/gcc/testsuite/gcc.target/arm/pr64818.c new file mode 100644 index 0000000..bddd846 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr64818.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +char temp[16]; +extern int foo1 (void); + +void foo (void) +{ + int i; + int len; + + while (1) + { + len = foo1 (); + register int a asm ("r0") = 5; + register char *b asm ("r1") = temp; + register int c asm ("r2") = len; + asm volatile ("mov %[r0], %[r0]\n mov %[r1], %[r1]\n mov %[r2], %[r2]\n" + : "+m"(*b) + : [r0]"r"(a), [r1]"r"(b), [r2]"r"(c)); + + for (i = 0; i < len; i++) + { + if (temp[i] == 10) + return; + } + } +} + +/* { dg-final { scan-assembler "\[\\t \]+mov\ r1,\ r1" } } */ |