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| author | Richard Henderson <rth@redhat.com> | 2003-06-12 23:13:51 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2003-06-12 23:13:51 -0700 |
| commit | ee4336ea817d3e6f91c0d2b33dc92bc8227538a8 (patch) | |
| tree | a40660f816598b8d59edc408c92ca342718b3775 /gcc | |
| parent | c37514ff623f1d8ea7cf9fa5a5af15ab70e4902b (diff) | |
| download | gcc-ee4336ea817d3e6f91c0d2b33dc92bc8227538a8.zip gcc-ee4336ea817d3e6f91c0d2b33dc92bc8227538a8.tar.gz gcc-ee4336ea817d3e6f91c0d2b33dc92bc8227538a8.tar.bz2 | |
re PR target/11089 (ICE: instantiate_virtual_regs_lossage while using sse built-ins)
PR target/11089
* config/i386/i386.md (sse_movaps): Use an expander to force
one operand to be a register.
(sse_movups): Likewise.
From-SVN: r67883
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 35 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/i386-sse-4.c | 27 |
3 files changed, 66 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index cec44af..5396c79 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2003-06-12 Richard Henderson <rth@redhat.com> + + PR target/11089 + * config/i386/i386.md (sse_movaps): Use an expander to force + one operand to be a register. + (sse_movups): Likewise. + 2003-06-13 Doug Evans <dje@sebabeach.org> Remove some build warnings. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 850e9a1..faf0e5a 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -19530,7 +19530,22 @@ ;; These two patterns are useful for specifying exactly whether to use ;; movaps or movups -(define_insn "sse_movaps" +(define_expand "sse_movaps" + [(set (match_operand:V4SF 0 "nonimmediate_operand" "") + (unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "")] + UNSPEC_MOVA))] + "TARGET_SSE" +{ + if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) + { + rtx tmp = gen_reg_rtx (V4SFmode); + emit_insn (gen_sse_movaps (tmp, operands[1])); + emit_move_insn (operands[0], tmp); + DONE; + } +}) + +(define_insn "*sse_movaps_1" [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m") (unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "xm,x")] UNSPEC_MOVA))] @@ -19540,7 +19555,22 @@ [(set_attr "type" "ssemov,ssemov") (set_attr "mode" "V4SF")]) -(define_insn "sse_movups" +(define_expand "sse_movups" + [(set (match_operand:V4SF 0 "nonimmediate_operand" "") + (unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "")] + UNSPEC_MOVU))] + "TARGET_SSE" +{ + if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) + { + rtx tmp = gen_reg_rtx (V4SFmode); + emit_insn (gen_sse_movups (tmp, operands[1])); + emit_move_insn (operands[0], tmp); + DONE; + } +}) + +(define_insn "*sse_movups_1" [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m") (unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "xm,x")] UNSPEC_MOVU))] @@ -19550,7 +19580,6 @@ [(set_attr "type" "ssecvt,ssecvt") (set_attr "mode" "V4SF")]) - ;; SSE Strange Moves. (define_insn "sse_movmskps" diff --git a/gcc/testsuite/gcc.dg/i386-sse-4.c b/gcc/testsuite/gcc.dg/i386-sse-4.c new file mode 100644 index 0000000..c94e7f8 --- /dev/null +++ b/gcc/testsuite/gcc.dg/i386-sse-4.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O0 -msse" } */ + +typedef void __vr __attribute__ ((__mode__ (__V4SF__))); + +struct vector +{ + union + { + __vr v; + float f[4]; + }; +}; + +void +doit () +{ + float f[4]; + struct vector v; + + f[0] = 0; + f[1] = 1; + f[2] = 2; + f[3] = 3; + + v.v = __builtin_ia32_loadups (f); +} |