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| author | Andrew Stubbs <ams@codesourcery.com> | 2023-11-22 13:46:12 +0000 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2023-11-22 14:24:21 +0000 |
| commit | ecb22ddbe2b676484d04e7979f7991f7eec93470 (patch) | |
| tree | dcf0254eececd516c206708e50c1888e584b20c9 /gcc | |
| parent | 95f61de95bbcc2e4fb7020e27698140abea23788 (diff) | |
| download | gcc-ecb22ddbe2b676484d04e7979f7991f7eec93470.zip gcc-ecb22ddbe2b676484d04e7979f7991f7eec93470.tar.gz gcc-ecb22ddbe2b676484d04e7979f7991f7eec93470.tar.bz2 | |
amdgcn: Fix vector TImode reload loop
I've only observed the problem on the devel/omp/gcc-13 branch, but this
could theoretically affect mainline also. The mov insns for the other modes
already have '$', so this completes the set.
gcc/ChangeLog:
* config/gcn/gcn-valu.md (*mov<mode>_4reg): Disparage AVGPR use when a
reload is required.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/gcn/gcn-valu.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 23f2bbe..a928dec 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -566,10 +566,10 @@ (match_operand:V_4REG 1 "general_operand"))] "" {@ [cons: =0, 1; attrs: type, length, gcn_version] - [v,vDB;vmult,16,* ] v_mov_b32\t%L0, %L1\; v_mov_b32\t%H0, %H1\; v_mov_b32\t%J0, %J1\; v_mov_b32\t%K0, %K1 - [v,a ;vmult,32,* ] v_accvgpr_read_b32\t%L0, %L1\; v_accvgpr_read_b32\t%H0, %H1\; v_accvgpr_read_b32\t%J0, %J1\; v_accvgpr_read_b32\t%K0, %K1 - [a,v ;vmult,32,* ] v_accvgpr_write_b32\t%L0, %L1\;v_accvgpr_write_b32\t%H0, %H1\;v_accvgpr_write_b32\t%J0, %J1\;v_accvgpr_write_b32\t%K0, %K1 - [a,a ;vmult,32,cdna2] v_accvgpr_mov_b32\t%L0, %L1\; v_accvgpr_mov_b32\t%H0, %H1\; v_accvgpr_mov_b32\t%J0, %J1\; v_accvgpr_mov_b32\t%K0, %K1 + [v ,vDB;vmult,16,* ] v_mov_b32\t%L0, %L1\; v_mov_b32\t%H0, %H1\; v_mov_b32\t%J0, %J1\; v_mov_b32\t%K0, %K1 + [v ,a ;vmult,32,* ] v_accvgpr_read_b32\t%L0, %L1\; v_accvgpr_read_b32\t%H0, %H1\; v_accvgpr_read_b32\t%J0, %J1\; v_accvgpr_read_b32\t%K0, %K1 + [$a,v ;vmult,32,* ] v_accvgpr_write_b32\t%L0, %L1\;v_accvgpr_write_b32\t%H0, %H1\;v_accvgpr_write_b32\t%J0, %J1\;v_accvgpr_write_b32\t%K0, %K1 + [a ,a ;vmult,32,cdna2] v_accvgpr_mov_b32\t%L0, %L1\; v_accvgpr_mov_b32\t%H0, %H1\; v_accvgpr_mov_b32\t%J0, %J1\; v_accvgpr_mov_b32\t%K0, %K1 }) (define_insn "mov<mode>_exec" |