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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-12-14 15:47:52 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-12-14 15:49:29 +0800 |
| commit | e9f0af150358d93b4c4c5f65d662748ae87bd3d0 (patch) | |
| tree | 05bf4b93049fc9ce542e65eaad28446fcddae860 /gcc | |
| parent | 9e20779a7d8e14e77df6efaeadc6bf3a001336ef (diff) | |
| download | gcc-e9f0af150358d93b4c4c5f65d662748ae87bd3d0.zip gcc-e9f0af150358d93b4c4c5f65d662748ae87bd3d0.tar.gz gcc-e9f0af150358d93b4c4c5f65d662748ae87bd3d0.tar.bz2 | |
RISC-V: Add failed SLP testcase
After recent RVV cost model tweak, I found this PR issue has been fixed.
Add testcase and committed.
PR target/112387
gcc/testsuite/ChangeLog:
* gcc.dg/vect/costmodel/riscv/rvv/pr112387.c: New test.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c new file mode 100644 index 0000000..ee44b5f --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fdump-tree-vect-details" } */ + +#include <stdint-gcc.h> + +void +f2 (uint64_t *__restrict y, uint64_t *__restrict x, + uint64_t *__restrict indices, uint64_t n) +{ + for (int64_t i = 0; i < n; ++i) + { + y[i * 2] = x[indices[i * 2]] + 1; + y[i * 2 + 1] = x[indices[i * 2 + 1]] + 2; + } +} + +/* { dg-final { scan-tree-dump "Loop contains only SLP stmts" vect } } */ +/* { dg-final { scan-assembler-not "vlseg" } } */ +/* { dg-final { scan-assembler-not "vsseg" } } */ |