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| author | Kito Cheng <kito.cheng@sifive.com> | 2023-04-27 22:00:39 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-05-03 18:01:19 +0800 |
| commit | e8511cbba692a9f3ff4d9c74e902fab03f154bbd (patch) | |
| tree | cb2c94349faa82bc4fc037b4c1aa2fdf1ad044e3 /gcc | |
| parent | 348788b19f55ce3a614b5c1ca6d2c46e0605e6b2 (diff) | |
| download | gcc-e8511cbba692a9f3ff4d9c74e902fab03f154bbd.zip gcc-e8511cbba692a9f3ff4d9c74e902fab03f154bbd.tar.gz gcc-e8511cbba692a9f3ff4d9c74e902fab03f154bbd.tar.bz2 | |
Docs: Add vector register constarint for asm operands
`vr`, `vm` and `vd` constarint for vector register constarint, those 3
constarint has implemented on LLVM as well.
gcc/ChangeLog:
* doc/md.texi (RISC-V): Add vr, vm, vd constarint.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/doc/md.texi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 07bf8bd..cc4a93a 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3535,6 +3535,15 @@ An address that is held in a general-purpose register. @item S A constraint that matches an absolute symbolic address. +@item vr +A vector register (if available).. + +@item vd +A vector register, excluding v0 (if available). + +@item vm +A vector register, only v0 (if available). + @end table @item RX---@file{config/rx/constraints.md} |