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| author | Jim MacArthur <jim.macarthur@arm.com> | 2012-05-24 11:07:57 +0000 |
|---|---|---|
| committer | Marcus Shawcroft <mshawcroft@gcc.gnu.org> | 2012-05-24 11:07:57 +0000 |
| commit | e7bcc691204350945d31fcb27b6d421cdf6d8453 (patch) | |
| tree | d2f0426293ac9bb76b776e8b899cf5ed99edfaf4 /gcc | |
| parent | b44be1e6cfcd00aa166e84d006232d9ddeda7b6f (diff) | |
| download | gcc-e7bcc691204350945d31fcb27b6d421cdf6d8453.zip gcc-e7bcc691204350945d31fcb27b6d421cdf6d8453.tar.gz gcc-e7bcc691204350945d31fcb27b6d421cdf6d8453.tar.bz2 | |
recog.c (reg_fits_class_p): Check both regno and regno + offset are hard registers.
2012-05-24 Jim MacArthur<jim.macarthur@arm.com>
* recog.c (reg_fits_class_p): Check both regno and regno + offset are
hard registers.
* regs.h (in_hard_reg_set_p): Assert that regno is a hard register and
check end_regno - 1 is a hard register.
From-SVN: r187826
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/recog.c | 8 | ||||
| -rw-r--r-- | gcc/regs.h | 7 |
3 files changed, 19 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5cd1531..8246ae9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2012-05-24 Jim MacArthur<jim.macarthur@arm.com> + + * recog.c (reg_fits_class_p): Check both regno and regno + offset are + hard registers. + * regs.h (in_hard_reg_set_p): Assert that regno is a hard register and + check end_regno - 1 is a hard register. + 2012-05-24 Richard Guenther <rguenther@suse.de> * varpool.c (add_new_static_var): Remove call to create_var_ann. diff --git a/gcc/recog.c b/gcc/recog.c index c5725d2..d664594 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -2792,14 +2792,16 @@ bool reg_fits_class_p (const_rtx operand, reg_class_t cl, int offset, enum machine_mode mode) { - int regno = REGNO (operand); + unsigned int regno = REGNO (operand); if (cl == NO_REGS) return false; + /* Regno must not be a pseudo register. Offset may be negative. */ return (HARD_REGISTER_NUM_P (regno) - && in_hard_reg_set_p (reg_class_contents[(int) cl], - mode, regno + offset)); + && HARD_REGISTER_NUM_P (regno + offset) + && in_hard_reg_set_p (reg_class_contents[(int) cl], mode, + regno + offset)); } /* Split single instruction. Helper function for split_all_insns and @@ -24,6 +24,7 @@ along with GCC; see the file COPYING3. If not see #include "machmode.h" #include "hard-reg-set.h" +#include "rtl.h" #define REG_BYTES(R) mode_size[(int) GET_MODE (R)] @@ -367,10 +368,16 @@ in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode, { unsigned int end_regno; + gcc_assert (HARD_REGISTER_NUM_P (regno)); + if (!TEST_HARD_REG_BIT (regs, regno)) return false; end_regno = end_hard_regno (mode, regno); + + if (!HARD_REGISTER_NUM_P (end_regno - 1)) + return false; + while (++regno < end_regno) if (!TEST_HARD_REG_BIT (regs, regno)) return false; |