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author | Jim Wilson <wilson@gcc.gnu.org> | 1992-08-25 20:22:37 -0700 |
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committer | Jim Wilson <wilson@gcc.gnu.org> | 1992-08-25 20:22:37 -0700 |
commit | e7952d8fa5e1c986024456da44dfec651e9a79a1 (patch) | |
tree | db3a7684d8a8ae7d3a4af6341abb0242af302537 /gcc | |
parent | e939539ba6ecb082e0352bca5026c7c9e9850716 (diff) | |
download | gcc-e7952d8fa5e1c986024456da44dfec651e9a79a1.zip gcc-e7952d8fa5e1c986024456da44dfec651e9a79a1.tar.gz gcc-e7952d8fa5e1c986024456da44dfec651e9a79a1.tar.bz2 |
(SF_MODES): Allow SImode in fp registers.
(output_floatsisf2, output_floatsidf2, output_floatsitf2): Delete.
From-SVN: r1955
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/sparc/sparc.c | 41 |
1 files changed, 1 insertions, 40 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index a3169ed..77aec46 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1958,7 +1958,7 @@ output_scc_insn (operands, insn) #define T_MODES (~C_MODES) /* Modes for single-float quantities. */ -#define SF_MODES ((1 << (int) SFmode)) +#define SF_MODES ((1 << (int) SFmode) | (1 << (int) SImode)) /* Modes for double-float quantities. */ #define DF_MODES (SF_MODES | (1 << (int) DFmode) | (1 << (int) SCmode)) @@ -2474,45 +2474,6 @@ output_return (operands) return "ret\n\trestore"; } } - -/* Output assembler code for a SImode to SFmode conversion. */ - -char * -output_floatsisf2 (operands) - rtx *operands; -{ - if (GET_CODE (operands[1]) == MEM) - return "ld %1,%0\n\tfitos %0,%0"; - else if (FP_REG_P (operands[1])) - return "fitos %1,%0"; - return "st %r1,[%%fp-4]\n\tld [%%fp-4],%0\n\tfitos %0,%0"; -} - -/* Output assembler code for a SImode to DFmode conversion. */ - -char * -output_floatsidf2 (operands) - rtx *operands; -{ - if (GET_CODE (operands[1]) == MEM) - return "ld %1,%0\n\tfitod %0,%0"; - else if (FP_REG_P (operands[1])) - return "fitod %1,%0"; - return "st %r1,[%%fp-4]\n\tld [%%fp-4],%0\n\tfitod %0,%0"; -} - -/* Output assembler code for a SImode to TFmode conversion. */ - -char * -output_floatsitf2 (operands) - rtx *operands; -{ - if (GET_CODE (operands[1]) == MEM) - return "ld %1,%0\n\tfitoq %0,%0"; - else if (FP_REG_P (operands[1])) - return "fitoq %1,%0"; - return "st %r1,[%%fp-4]\n\tld [%%fp-4],%0\n\tfitoq %0,%0"; -} /* Leaf functions and non-leaf functions have different needs. */ |