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authorMatthew Fortune <matthew.fortune@imgtec.com>2016-05-16 12:45:31 +0000
committerMatthew Fortune <mpf@gcc.gnu.org>2016-05-16 12:45:31 +0000
commite6e89f0d17162bbefd16000f65110d49a4541d41 (patch)
tree2b6cfb557e44dbc9f2a7d18265741c415d1d0275 /gcc
parentd972bae09cb9737f86d48ea57c4b50d470edad85 (diff)
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Fix multi-line brackets in mips-cpus.def
gcc/ * config/mips/mips-cpus.def (p5600): Add multi-line brackets. From-SVN: r236284
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/mips/mips-cpus.def4
2 files changed, 6 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index da58116d..4507686 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2016-05-16 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/mips/mips-cpus.def (p5600): Add multi-line brackets.
+
2016-05-16 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3):
diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def
index 5df9807..b46c86f 100644
--- a/gcc/config/mips/mips-cpus.def
+++ b/gcc/config/mips/mips-cpus.def
@@ -147,8 +147,8 @@ MIPS_CPU ("1004kf1_1", PROCESSOR_24KF1_1, 33, 0)
MIPS_CPU ("interaptiv", PROCESSOR_24KF2_1, 33, 0)
/* MIPS32 Release 5 processors. */
-MIPS_CPU ("p5600", PROCESSOR_P5600, 36, PTF_AVOID_BRANCHLIKELY
- | PTF_AVOID_IMADD)
+MIPS_CPU ("p5600", PROCESSOR_P5600, 36, (PTF_AVOID_BRANCHLIKELY
+ | PTF_AVOID_IMADD))
MIPS_CPU ("m5100", PROCESSOR_M5100, 36, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("m5101", PROCESSOR_M5100, 36, PTF_AVOID_BRANCHLIKELY)