aarch64 testsuite: Check entire .arch string

Add a terminating newline to various tests, and add missing
extensions to some test strings.  The current output is broken for
options_set_4.c, so this test is left unchanged, to be fixed in a
subsequent patch.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/cpunative/native_cpu_18.c: Add \+nopauth\n
	* gcc.target/aarch64/options_set_7.c: Add \+crc\n
	* gcc.target/aarch64/options_set_8.c: Add \+crc\+nodotprod\n
	* gcc.target/aarch64/cpunative/native_cpu_0.c: Add \n
	* gcc.target/aarch64/cpunative/native_cpu_1.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_2.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_3.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_4.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_5.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_6.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_7.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_8.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_9.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_10.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_11.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_12.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_13.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_14.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_15.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_16.c: Ditto.
	* gcc.target/aarch64/cpunative/native_cpu_17.c: Ditto.
	* gcc.target/aarch64/options_set_1.c: Ditto.
	* gcc.target/aarch64/options_set_2.c: Ditto.
	* gcc.target/aarch64/options_set_3.c: Ditto.
	* gcc.target/aarch64/options_set_5.c: Ditto.
	* gcc.target/aarch64/options_set_6.c: Ditto.
	* gcc.target/aarch64/options_set_9.c: Ditto.
	* gcc.target/aarch64/options_set_11.c: Ditto.
	* gcc.target/aarch64/options_set_12.c: Ditto.
	* gcc.target/aarch64/options_set_13.c: Ditto.
	* gcc.target/aarch64/options_set_14.c: Ditto.
	* gcc.target/aarch64/options_set_15.c: Ditto.
	* gcc.target/aarch64/options_set_16.c: Ditto.
	* gcc.target/aarch64/options_set_17.c: Ditto.
	* gcc.target/aarch64/options_set_18.c: Ditto.
	* gcc.target/aarch64/options_set_19.c: Ditto.
	* gcc.target/aarch64/options_set_20.c: Ditto.
	* gcc.target/aarch64/options_set_21.c: Ditto.
	* gcc.target/aarch64/options_set_22.c: Ditto.
	* gcc.target/aarch64/options_set_23.c: Ditto.
	* gcc.target/aarch64/options_set_24.c: Ditto.
	* gcc.target/aarch64/options_set_25.c: Ditto.
	* gcc.target/aarch64/options_set_26.c: Ditto.

43 files changed, 43 insertions, 43 deletions

diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
index 8499f87..fb5a7a1 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\n} } } */
 
 /* Test a normal looking procinfo.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
index 2cf0e89..cb50e3b 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_1.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+nosimd} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nosimd\n} } } */
 
 /* Test one where fp is on by default so turn off simd.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
index ddb06b8..6a524ba 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_10.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+nofp} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nofp\n} } } */
 
 /* Test one with no entry in feature list.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
index 96b9ca4..644f479 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_11.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+sb} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sb\n} } } */
 
 /* Test one with a feature name that overlaps with another one.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
index c3b44ad..fb34ddf 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_12.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+ssbs} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+ssbs\n} } } */
 
 /* Test one where the longer feature overlaps with a shorter one.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
index 5516690..b29d50e 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\n} } } */
 
 /* Test one with mixed order of feature bits.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
index 781ab1e..59846f7 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_14.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod\n} } } */
 
 /* Test one where valid feature bits are at a boundary > buffer size.   */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
index c9205d9..68a5189 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_15.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4\n} } } */
 
 /* Test one where the bounary of buffer size would cut off and leave
    a valid feature in the first full buffer.  e.g. this will cut off at
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
index 2f963bb..b361316 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2\n} } } */
 
 /* Test a normal looking procinfo.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
index c68a697..a9dde5f 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2\n} } } */
 
 /* Test a normal looking procinfo.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
index b5f0a30..10325df 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_18.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8.6-a\+crc\+fp16\+aes\+sha3\+rng} } } */
+/* { dg-final { scan-assembler {\.arch armv8.6-a\+crc\+fp16\+aes\+sha3\+rng\+nopauth\n} } } */
 
 /* Test one where the boundary of buffer size would overwrite the last
    character read when stitching the fgets-calls together.  With the
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
index edbdb56..cfca02c 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_2.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+nofp} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+nofp\n} } } */
 
 /* Test one where asimd is provided byt no fp.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
index 50685c2..316ddbd 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_3.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\n} } } */
 
 /* Test where asimd and fp are the only ones provided, these are default
    and so shouldn't emit anything.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
index 91ae809..053dd2b 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_4.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\n} } } */
 
 /* Test one where all crypto bits are given so crypto should be enabled.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
index 84139e5..49dee9d 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_5.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\n} } } */
 
 /* Test one where fp16 is available and so should be emitted.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
index 7608e88..20012be 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto\n} } } */
 
 /* Test one where the feature bits for crypto and fp16 are given in
    same order as declared in options file.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
index 72b14b4..70a7e62 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto\n} } } */
 
 /* Test one where the crypto and fp16 options are specified in different
    order from what is in the options file.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
index 7a5a214..795dd5f 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_8.c
@@ -7,6 +7,6 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve\n} } } */
 
 /* Test one where sve is enabled.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
index 528b5d0..6b55a73 100644
--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_9.c
@@ -7,7 +7,7 @@ int main()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4} } } */
+/* { dg-final { scan-assembler {\.arch armv8-a\+sve2-sm4\n} } } */
 
 /* Test one here a feature that is a prefix of another is enabled.
    In this case sve is a prefix to svesm4, but sve2-sm4 should be
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_1.c b/gcc/testsuite/gcc.target/aarch64/options_set_1.c
index 40d9a05..dc5eff8 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_1.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\n} 1 } } */
 
 /* Check to see if crc is output by default.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_11.c b/gcc/testsuite/gcc.target/aarch64/options_set_11.c
index d083bfd..e0e82cf 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_11.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_11.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\n} } } */
 
  /* FP is default on, no need to pass on to assembler.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_12.c b/gcc/testsuite/gcc.target/aarch64/options_set_12.c
index 58a09fd..aef44b3 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_12.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_12.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16\n} } } */
 
  /* fp16 not default, should be emitted.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_13.c b/gcc/testsuite/gcc.target/aarch64/options_set_13.c
index 2a517ec..b116e08 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_13.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_13.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16\n} } } */
 
  /* FP is part of FP16, don't emit it.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_14.c b/gcc/testsuite/gcc.target/aarch64/options_set_14.c
index c192bf6..e9fc3e5 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_14.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_14.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml\n} } } */
 
  /* fmp16fml is smallest option to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_15.c b/gcc/testsuite/gcc.target/aarch64/options_set_15.c
index 32ec3ea..999791b 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_15.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_15.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml*} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml*\n} } } */
 
  /* fp included in fp16fml, only emit latter.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_16.c b/gcc/testsuite/gcc.target/aarch64/options_set_16.c
index b45c01a..477b71c 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_16.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_16.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml\n} } } */
 
  /* fp16fml is smallest options to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_17.c b/gcc/testsuite/gcc.target/aarch64/options_set_17.c
index c490e1f..8b21e2e 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_17.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_17.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+dotprod} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+dotprod\n} } } */
 
  /* dotprod needs to be emitted pre armv8.4.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_18.c b/gcc/testsuite/gcc.target/aarch64/options_set_18.c
index 61587db..977b41e 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_18.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_18.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\n} } } */
 
  /* dotprod is default in armv8.4-a, don't emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_19.c b/gcc/testsuite/gcc.target/aarch64/options_set_19.c
index 72b5812..0b2ec02 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_19.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_19.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\n} } } */
 
  /* fp default, don't emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_2.c b/gcc/testsuite/gcc.target/aarch64/options_set_2.c
index f82cb5f..937edc6 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_2.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto\n} 1 } } */
 
 /* Check to see if crc and crypto are maintained if crypto specified.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_20.c b/gcc/testsuite/gcc.target/aarch64/options_set_20.c
index b383e0a..452b48c 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_20.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_20.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_21.c b/gcc/testsuite/gcc.target/aarch64/options_set_21.c
index 19fcd6f..f142e70 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_21.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_21.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_22.c b/gcc/testsuite/gcc.target/aarch64/options_set_22.c
index 77ae408..04ddd46 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_22.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_22.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_23.c b/gcc/testsuite/gcc.target/aarch64/options_set_23.c
index dee637c..81cfe01 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_23.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_23.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_24.c b/gcc/testsuite/gcc.target/aarch64/options_set_24.c
index 54b0e3d..425cc51 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_24.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_24.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_25.c b/gcc/testsuite/gcc.target/aarch64/options_set_25.c
index a3b2d63..5a3c105 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_25.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_25.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_26.c b/gcc/testsuite/gcc.target/aarch64/options_set_26.c
index b383e0a..452b48c 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_26.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_26.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
+/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16\n} } } */
 
  /* fp16 smallest set to emit.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_3.c b/gcc/testsuite/gcc.target/aarch64/options_set_3.c
index 7d350cf..96140e3 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_3.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto\n} 1 } } */
 
 /* Check if smallest set is maintained when outputting. */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_5.c b/gcc/testsuite/gcc.target/aarch64/options_set_5.c
index b4c0901..028fbc4 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_5.c
@@ -6,7 +6,7 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes\n} 1 } } */
 
 /* Check if turning off feature bits works correctly and grouping is no
    longer valid.   */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_6.c b/gcc/testsuite/gcc.target/aarch64/options_set_6.c
index 2a1d7fe..09ebdaa 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_6.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+aes\n} 1 } } */
 
 /* +crypto turns on +aes and +sha2, but +nosha2 disables +crypto.   */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_7.c b/gcc/testsuite/gcc.target/aarch64/options_set_7.c
index 71a2c8a..eb5724f 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_7.c
@@ -6,6 +6,6 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a\+crc\n} 1 } } */
 
 /* Checking if enabling default features drops the superfluous bits.   */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_8.c b/gcc/testsuite/gcc.target/aarch64/options_set_8.c
index 83be1bd..a0eacff 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_8.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_8.c
@@ -6,7 +6,7 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\.4\-a\+crc\+nodotprod\n} 1 } } */
 
 /* Checking if trying to turn off default features propagates the commandline
    option.  */
diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_9.c b/gcc/testsuite/gcc.target/aarch64/options_set_9.c
index e3c7cdc..5052f89 100644
--- a/gcc/testsuite/gcc.target/aarch64/options_set_9.c
+++ b/gcc/testsuite/gcc.target/aarch64/options_set_9.c
@@ -6,7 +6,7 @@ int main ()
   return 0;
 }
 
-/* { dg-final { scan-assembler-times {\.arch armv8\-a} 1 } } */
+/* { dg-final { scan-assembler-times {\.arch armv8\-a\n} 1 } } */
 
  /* Check that grouping of bits that don't form a synthetic group don't turn
     on the parent. e.g. rdma turns on simd+fp, but simd+fp does not turn on