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| author | Richard Henderson <rth@cygnus.com> | 1999-03-17 06:49:22 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 1999-03-17 06:49:22 -0800 |
| commit | e6a8ebb4e0d322e52f767364761ae8ed20c8a317 (patch) | |
| tree | a9c3933c0256a0e7d3852288be8cfeb80d5ca2c8 /gcc | |
| parent | aec3cfba19c324590612c95a33b14d4142a19823 (diff) | |
| download | gcc-e6a8ebb4e0d322e52f767364761ae8ed20c8a317.zip gcc-e6a8ebb4e0d322e52f767364761ae8ed20c8a317.tar.gz gcc-e6a8ebb4e0d322e52f767364761ae8ed20c8a317.tar.bz2 | |
alpha.h (HARD_REGNO_MODE_OK): Allow only 4 and 8 byte unit modes in FP regs.
* alpha.h (HARD_REGNO_MODE_OK): Allow only 4 and 8 byte unit modes
in FP regs.
(MODES_TIEABLE_P): Define asymmetricly wrt modes illegal in FP regs.
From-SVN: r25825
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.h | 19 |
2 files changed, 17 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d4d97d8..3d8f5fe 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Wed Mar 17 14:51:19 1999 Richard Henderson <rth@cygnus.com> + + * alpha.h (HARD_REGNO_MODE_OK): Allow only 4 and 8 byte unit modes + in FP regs. + (MODES_TIEABLE_P): Define asymmetricly wrt modes illegal in FP regs. + Wed Mar 17 14:41:41 1999 Nick Clifton <nickc@cygnus.com> * config/arm/aout.h (ASM_GENERATE_INTERNAL_LABEL): Fix compile diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 3e119a7..4587bbf 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -622,17 +622,20 @@ extern void override_options (); registers can hold 32-bit and 64-bit integers as well, but not 16-bit or 8-bit values. */ -#define HARD_REGNO_MODE_OK(REGNO, MODE) \ - ((REGNO) < 32 || ((MODE) != QImode && (MODE) != HImode)) +#define HARD_REGNO_MODE_OK(REGNO, MODE) \ + ((REGNO) >= 32 && (REGNO) <= 62 \ + ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \ + : 1) + +/* A C expression that is nonzero if a value of mode + MODE1 is accessible in mode MODE2 without copying. -/* Value is 1 if it is a good idea to tie two pseudo registers - when one has mode MODE1 and one has mode MODE2. - If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, - for any hard reg, then this must be 0 for correct output. */ + This asymmetric test is true when MODE1 could be put + in an FP register but MODE2 could not. */ #define MODES_TIEABLE_P(MODE1, MODE2) \ - ((MODE1) == QImode || (MODE1) == HImode \ - ? (MODE2) == QImode || (MODE2) == HImode \ + (HARD_REGNO_MODE_OK (32, (MODE1)) \ + ? HARD_REGNO_MODE_OK (32, (MODE2)) \ : 1) /* Specify the registers used for certain standard purposes. |