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| author | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | 2023-01-18 11:13:05 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-01-27 18:03:11 +0800 |
| commit | e577b91bbaa7075655de4da4b8af95216d8b1f6d (patch) | |
| tree | a50d833cc86c43970f0b559ab9c5b15d7e852090 /gcc | |
| parent | 4369d499f711933b8f204f896cb654423e99b039 (diff) | |
| download | gcc-e577b91bbaa7075655de4da4b8af95216d8b1f6d.zip gcc-e577b91bbaa7075655de4da4b8af95216d8b1f6d.tar.gz gcc-e577b91bbaa7075655de4da4b8af95216d8b1f6d.tar.bz2 | |
RISC-V: Refine function args of some functions.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
(emit_vsetvl_insn): Ditto.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/riscv-vsetvl.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 8b3fd33..45e14d0 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -579,7 +579,7 @@ has_vector_insn (function *fn) /* Emit vsetvl instruction. */ static rtx -gen_vsetvl_pat (enum vsetvl_type insn_type, vl_vtype_info info, rtx vl) +gen_vsetvl_pat (enum vsetvl_type insn_type, const vl_vtype_info &info, rtx vl) { rtx avl = info.get_avl (); rtx sew = gen_int_mode (info.get_sew (), Pmode); @@ -599,7 +599,7 @@ gen_vsetvl_pat (enum vsetvl_type insn_type, vl_vtype_info info, rtx vl) } static rtx -gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info info) +gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info &info) { rtx new_pat; if (vsetvl_insn_p (rinsn) || vlmax_avl_p (info.get_avl ())) @@ -616,7 +616,7 @@ gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info info) static void emit_vsetvl_insn (enum vsetvl_type insn_type, enum emit_type emit_type, - vl_vtype_info info, rtx vl, rtx_insn *rinsn) + const vl_vtype_info &info, rtx vl, rtx_insn *rinsn) { rtx pat = gen_vsetvl_pat (insn_type, info, vl); if (dump_file) |