(negsi2): Change into define_expand.

(negsi2_internal): Rename from old negsi2, changed condition to !TARGET_5200.
(negsi2_5200): New insn.
(one_cmplsi2): Change into define_expand.
(one_cmplsi2_internal): Rename from old one_cmplsi2, changed
condition to !TARGET_5200.
(one_cmplsi2_5200): New insn.
(negdi2_5200): Corrected constraints.
(one_cmpldi2): Changed condition to !TARGET_5200.

From-SVN: r13136

1 files changed, 46 insertions, 13 deletions

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 538c8dd..b9b3bff 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -3712,24 +3712,38 @@
 } ")
 
 (define_insn "negdi2_5200"
-  [(set (match_operand:DI 0 "general_operand" "=<,do")
-	(neg:DI (match_operand:DI 1 "general_operand" "0,0")))]
+  [(set (match_operand:DI 0 "general_operand" "=d")
+	(neg:DI (match_operand:DI 1 "general_operand" "0")))]
   "TARGET_5200"
   "*
 {
-  if (which_alternative == 0)
-    return \"neg%.l %0\;negx%.l %0\";
-  if (GET_CODE (operands[0]) == REG)
-    operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
-  else
-    operands[1] = adj_offsettable_operand (operands[0], 4);
+  operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
   return \"neg%.l %1\;negx%.l %0\";
 } ")
 
-(define_insn "negsi2"
+(define_expand "negsi2"
+  [(set (match_operand:SI 0 "general_operand" "")
+	(neg:SI (match_operand:SI 1 "general_operand" "")))]
+  ""
+  "
+{
+  if (TARGET_5200)
+    emit_insn (gen_negsi2_5200 (operands[0], operands[1]));
+  else
+    emit_insn (gen_negsi2_internal (operands[0], operands[1]));
+  DONE;
+}")
+
+(define_insn "negsi2_internal"
   [(set (match_operand:SI 0 "general_operand" "=dm")
 	(neg:SI (match_operand:SI 1 "general_operand" "0")))]
-  ""
+  "!TARGET_5200"
+  "neg%.l %0")
+
+(define_insn "negsi2_5200"
+  [(set (match_operand:SI 0 "general_operand" "=d")
+	(neg:SI (match_operand:SI 1 "general_operand" "0")))]
+  "TARGET_5200"
   "neg%.l %0")
 
 (define_insn "neghi2"
@@ -3993,7 +4007,7 @@
 (define_insn "one_cmpldi2"
   [(set (match_operand:DI 0 "general_operand" "=dm")
 	(not:DI (match_operand:DI 1 "general_operand" "0")))]
-  ""
+  "!TARGET_5200"
   "*
 {
   CC_STATUS_INIT;
@@ -4007,10 +4021,29 @@
   return \"not%.l %1\;not%.l %0\";
 }")
 
-(define_insn "one_cmplsi2"
+(define_expand "one_cmplsi2"
+  [(set (match_operand:SI 0 "general_operand" "")
+	(not:SI (match_operand:SI 1 "general_operand" "")))]
+  ""
+  "
+{
+  if (TARGET_5200)
+    emit_insn (gen_one_cmplsi2_5200 (operands[0], operands[1]));
+  else
+    emit_insn (gen_one_cmplsi2_internal (operands[0], operands[1]));
+  DONE;
+}")
+
+(define_insn "one_cmplsi2_internal"
   [(set (match_operand:SI 0 "general_operand" "=dm")
 	(not:SI (match_operand:SI 1 "general_operand" "0")))]
-  ""
+  "!TARGET_5200"
+  "not%.l %0")
+
+(define_insn "one_cmplsi2_5200"
+  [(set (match_operand:SI 0 "general_operand" "=d")
+	(not:SI (match_operand:SI 1 "general_operand" "0")))]
+  "TARGET_5200"
   "not%.l %0")
 
 (define_insn "one_cmplhi2"