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| author | Aldy Hernandez <aldyh@redhat.com> | 2002-05-07 08:04:31 +0000 |
|---|---|---|
| committer | Aldy Hernandez <aldyh@gcc.gnu.org> | 2002-05-07 08:04:31 +0000 |
| commit | df966bffc06447c172461653038fbd660dc7fed2 (patch) | |
| tree | df957735718565feb3c07e6d7dc31dbf8cd8edd9 /gcc | |
| parent | ac8c66f3cebf27d0b86d7d88e6c90da75f4f6644 (diff) | |
| download | gcc-df966bffc06447c172461653038fbd660dc7fed2.zip gcc-df966bffc06447c172461653038fbd660dc7fed2.tar.gz gcc-df966bffc06447c172461653038fbd660dc7fed2.tar.bz2 | |
rs6000.c (bdesc_2arg): Fix vmax typos.
2002-05-07 Aldy Hernandez <aldyh@redhat.com>
* config/rs6000/rs6000.c (bdesc_2arg): Fix vmax typos.
From-SVN: r53254
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 10 |
2 files changed, 9 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0c54cde..791a6b1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2002-05-07 Aldy Hernandez <aldyh@redhat.com> + + * config/rs6000/rs6000.c (bdesc_2arg): Fix vmax typos. + 2002-05-06 Richard Henderson <rth@redhat.com> PR c++/6212 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 2fceccf..e40340b 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3393,11 +3393,11 @@ static const struct builtin_description bdesc_2arg[] = { MASK_ALTIVEC, CODE_FOR_altivec_vctuxs, "__builtin_altivec_vctuxs", ALTIVEC_BUILTIN_VCTUXS }, { MASK_ALTIVEC, CODE_FOR_umaxv16qi3, "__builtin_altivec_vmaxub", ALTIVEC_BUILTIN_VMAXUB }, { MASK_ALTIVEC, CODE_FOR_smaxv16qi3, "__builtin_altivec_vmaxsb", ALTIVEC_BUILTIN_VMAXSB }, - { MASK_ALTIVEC, CODE_FOR_uminv8hi3, "__builtin_altivec_vmaxuh", ALTIVEC_BUILTIN_VMAXUH }, - { MASK_ALTIVEC, CODE_FOR_sminv8hi3, "__builtin_altivec_vmaxsh", ALTIVEC_BUILTIN_VMAXSH }, - { MASK_ALTIVEC, CODE_FOR_uminv4si3, "__builtin_altivec_vmaxuw", ALTIVEC_BUILTIN_VMAXUW }, - { MASK_ALTIVEC, CODE_FOR_sminv4si3, "__builtin_altivec_vmaxsw", ALTIVEC_BUILTIN_VMAXSW }, - { MASK_ALTIVEC, CODE_FOR_sminv4sf3, "__builtin_altivec_vmaxfp", ALTIVEC_BUILTIN_VMAXFP }, + { MASK_ALTIVEC, CODE_FOR_umaxv8hi3, "__builtin_altivec_vmaxuh", ALTIVEC_BUILTIN_VMAXUH }, + { MASK_ALTIVEC, CODE_FOR_smaxv8hi3, "__builtin_altivec_vmaxsh", ALTIVEC_BUILTIN_VMAXSH }, + { MASK_ALTIVEC, CODE_FOR_umaxv4si3, "__builtin_altivec_vmaxuw", ALTIVEC_BUILTIN_VMAXUW }, + { MASK_ALTIVEC, CODE_FOR_smaxv4si3, "__builtin_altivec_vmaxsw", ALTIVEC_BUILTIN_VMAXSW }, + { MASK_ALTIVEC, CODE_FOR_smaxv4sf3, "__builtin_altivec_vmaxfp", ALTIVEC_BUILTIN_VMAXFP }, { MASK_ALTIVEC, CODE_FOR_altivec_vmrghb, "__builtin_altivec_vmrghb", ALTIVEC_BUILTIN_VMRGHB }, { MASK_ALTIVEC, CODE_FOR_altivec_vmrghh, "__builtin_altivec_vmrghh", ALTIVEC_BUILTIN_VMRGHH }, { MASK_ALTIVEC, CODE_FOR_altivec_vmrghw, "__builtin_altivec_vmrghw", ALTIVEC_BUILTIN_VMRGHW }, |