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author | Gavin Romig-Koch <gavin@cygnus.com> | 1999-02-03 12:31:38 +0000 |
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committer | Gavin Romig-Koch <gavin@gcc.gnu.org> | 1999-02-03 12:31:38 +0000 |
commit | de52e202c29386858f2c678e6d8ac3c8a3ac0718 (patch) | |
tree | 7e72e723b324f302cd7ade79453b75a5b65d5f13 /gcc | |
parent | b9cd54d2655fc42a34fc7d204122ec7e154a89d8 (diff) | |
download | gcc-de52e202c29386858f2c678e6d8ac3c8a3ac0718.zip gcc-de52e202c29386858f2c678e6d8ac3c8a3ac0718.tar.gz gcc-de52e202c29386858f2c678e6d8ac3c8a3ac0718.tar.bz2 |
(div_trap_mips16): Remove nop's after branches.
From-SVN: r25004
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/config/mips/mips.md | 37 |
2 files changed, 23 insertions, 18 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 267f494..556f5db 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +Wed Feb 3 15:26:58 1999 Gavin Romig-Koch <gavin@cygnus.com> + + * config/mips/mips.md (div_trap_mips16): Remove nop's after branches. + Wed Feb 3 11:56:23 1999 Jeffrey A Law (law@cygnus.com) * pa.c (insn_sets_and_refs_are_delayed): New function. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 1e64a05..71bd9a6 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -2248,7 +2248,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2298,7 +2298,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2348,7 +2348,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2389,7 +2389,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2414,7 +2414,7 @@ (define_expand "div_trap" [(trap_if (eq (match_operand 0 "register_operand" "d") - (match_operand 1 "reg_or_0_operand" "dJ")) + (match_operand 1 "true_reg_or_0_operand" "dJ")) (match_operand 2 "immediate_operand" ""))] "" " @@ -2428,7 +2428,7 @@ (define_insn "div_trap_normal" [(trap_if (eq (match_operand 0 "register_operand" "d") - (match_operand 1 "reg_or_0_operand" "dJ")) + (match_operand 1 "true_reg_or_0_operand" "dJ")) (match_operand 2 "immediate_operand" ""))] "!TARGET_MIPS16" "* @@ -2471,7 +2471,7 @@ (define_insn "div_trap_mips16" [(trap_if (eq (match_operand 0 "register_operand" "d") - (match_operand 1 "reg_or_0_operand" "dJ")) + (match_operand 1 "true_reg_or_0_operand" "dJ")) (match_operand 2 "immediate_operand" "")) (clobber (reg:SI 24))] "TARGET_MIPS16" @@ -2490,15 +2490,16 @@ have_dep_anti = 1; if (! have_dep_anti) { + /* No branch delay slots on mips16. */ if (GET_CODE (operands[1]) == CONST_INT) - return \"%(bnez\\t%0,1f\\n\\tnop\\n\\tbreak\\t%2\\n1:%)\"; + return \"%(bnez\\t%0,1f\\n\\tbreak\\t%2\\n1:%)\"; else - return \"%(bne\\t%0,%1,1f\\n\\tnop\\n\\tbreak\\t%2\\n1:%)\"; + return \"%(bne\\t%0,%1,1f\\n\\tbreak\\t%2\\n1:%)\"; } return \"\"; }" [(set_attr "type" "unknown") - (set_attr "length" "4")]) + (set_attr "length" "3")]) (define_expand "divsi3" [(set (match_operand:SI 0 "register_operand" "=l") @@ -2515,7 +2516,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2558,7 +2559,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2601,7 +2602,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2644,7 +2645,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } if (TARGET_CHECK_RANGE_DIV) @@ -2687,7 +2688,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2721,7 +2722,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2755,7 +2756,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (SImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } @@ -2789,7 +2790,7 @@ if (!TARGET_NO_CHECK_ZERO_DIV) { emit_insn (gen_div_trap (operands[2], - copy_to_mode_reg (DImode, GEN_INT (0)), + GEN_INT (0), GEN_INT (0x7))); } |