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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2017-06-21 10:46:02 +0000 |
|---|---|---|
| committer | Wilco Dijkstra <wilco@gcc.gnu.org> | 2017-06-21 10:46:02 +0000 |
| commit | dca19fe10daf00bfef714e3f9f98c63ff70c7a64 (patch) | |
| tree | 299fb3d6951d77ea9481949905d0bce787c70afb /gcc | |
| parent | f28e54bd06f3733ff147128107a8da6d3e6d428e (diff) | |
| download | gcc-dca19fe10daf00bfef714e3f9f98c63ff70c7a64.zip gcc-dca19fe10daf00bfef714e3f9f98c63ff70c7a64.tar.gz gcc-dca19fe10daf00bfef714e3f9f98c63ff70c7a64.tar.bz2 | |
Improve dup pattern
Improve the dup pattern to prefer vector registers. When doing a dup
after a load, the register allocator thinks the costs are identical
and chooses an integer load. However a dup from an integer register
includes an int->fp transfer which is not modelled. Adding a '?' to
the integer variant means the cost is increased slightly so we prefer
using a vector register. This improves the following example:
#include <arm_neon.h>
void f(unsigned *a, uint32x4_t *b)
{
b[0] = vdupq_n_u32(a[1]);
b[1] = vdupq_n_u32(a[2]);
}
to:
ldr s0, [x0, 4]
dup v0.4s, v0.s[0]
str q0, [x1]
ldr s0, [x0, 8]
dup v0.4s, v0.s[0]
str q0, [x1, 16]
ret
gcc/
* config/aarch64/aarch64-simd.md (aarch64_simd_dup):
Swap alternatives, make integer dup more expensive.
From-SVN: r249443
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-simd.md | 8 |
2 files changed, 9 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1aaaf61..1fc622b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> + * config/aarch64/aarch64-simd.md (aarch64_simd_dup): + Swap alternatives, make integer dup more expensive. + +2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> + * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Return true for non-tls symbols. diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index e811f3e..c949465 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -44,12 +44,12 @@ (define_insn "aarch64_simd_dup<mode>" [(set (match_operand:VDQ_I 0 "register_operand" "=w, w") (vec_duplicate:VDQ_I - (match_operand:<VEL> 1 "register_operand" "r, w")))] + (match_operand:<VEL> 1 "register_operand" "w,?r")))] "TARGET_SIMD" "@ - dup\\t%0.<Vtype>, %<vw>1 - dup\\t%0.<Vtype>, %1.<Vetype>[0]" - [(set_attr "type" "neon_from_gp<q>, neon_dup<q>")] + dup\\t%0.<Vtype>, %1.<Vetype>[0] + dup\\t%0.<Vtype>, %<vw>1" + [(set_attr "type" "neon_dup<q>, neon_from_gp<q>")] ) (define_insn "aarch64_simd_dup<mode>" |