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author | Oleg Endo <olegendo@gcc.gnu.org> | 2012-04-11 23:01:12 +0000 |
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committer | Oleg Endo <olegendo@gcc.gnu.org> | 2012-04-11 23:01:12 +0000 |
commit | da97611d45bc266f3f6b0fc502bb2e7a0cee2529 (patch) | |
tree | 6e228da6014acb3299397623cfe1c23a2d824bed /gcc | |
parent | c7b57b22c5507d498c92702e0d73fa4b00049fac (diff) | |
download | gcc-da97611d45bc266f3f6b0fc502bb2e7a0cee2529.zip gcc-da97611d45bc266f3f6b0fc502bb2e7a0cee2529.tar.gz gcc-da97611d45bc266f3f6b0fc502bb2e7a0cee2529.tar.bz2 |
re PR target/50751 (SH Target: Displacement addressing does not work for QImode and HImode)
PR target/50751
* gcc/target/sh/pr50751-4.c: New.
* gcc/target/sh/pr50751-5.c: New.
* gcc/target/sh/pr50751-6.c: New.
* gcc/target/sh/pr50751-7.c: New.
From-SVN: r186365
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/sh/pr50751-4.c | 30 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/sh/pr50751-5.c | 27 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/sh/pr50751-6.c | 26 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/sh/pr50751-7.c | 35 |
5 files changed, 126 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index bb945cb..67c7099 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2012-04-12 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/50751 + * gcc/target/sh/pr50751-4.c: New. + * gcc/target/sh/pr50751-5.c: New. + * gcc/target/sh/pr50751-6.c: New. + * gcc/target/sh/pr50751-7.c: New. + 2012-04-11 Fabien ChĂȘne <fabien@gcc.gnu.org> PR c++/52465 diff --git a/gcc/testsuite/gcc.target/sh/pr50751-4.c b/gcc/testsuite/gcc.target/sh/pr50751-4.c new file mode 100644 index 0000000..f3f0357 --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr50751-4.c @@ -0,0 +1,30 @@ +/* Check that the mov.w displacement addressing insn is generated. + If the insn is generated as expected, there should be no address + calculations outside the mov insns. */ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-O1" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */ +/* { dg-final { scan-assembler-not "add|sub" } } */ + +void +testfunc_00 (const short* ap, short* bp, short val) +{ + bp[0] = ap[15]; + bp[2] = ap[5]; + bp[9] = ap[7]; + bp[0] = ap[15]; + bp[4] = val; + bp[14] = val; +} + +void +testfunc_01 (volatile const short* ap, volatile short* bp, short val) +{ + bp[0] = ap[15]; + bp[2] = ap[5]; + bp[9] = ap[7]; + bp[0] = ap[15]; + bp[4] = val; + bp[14] = val; +} + diff --git a/gcc/testsuite/gcc.target/sh/pr50751-5.c b/gcc/testsuite/gcc.target/sh/pr50751-5.c new file mode 100644 index 0000000..48d5403 --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr50751-5.c @@ -0,0 +1,27 @@ +/* Check that the mov.w displacement addressing insn is generated and the + base address is adjusted only once. On SH2A this test is skipped because + there is a 4 byte mov.w insn that can handle larger displacements. Thus + on SH2A the base address will not be adjusted in this case. */ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-O1" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" "-m2a*" } { "" } } */ +/* { dg-final { scan-assembler-times "add" 2 } } */ + +void +testfunc_00 (const short* ap, short* bp) +{ + bp[0] = ap[15]; + bp[2] = ap[5]; + bp[9] = ap[7]; + bp[0] = ap[25]; +} + +void +testfunc_01 (volatile const short* ap, volatile short* bp) +{ + bp[0] = ap[15]; + bp[2] = ap[5]; + bp[9] = ap[7]; + bp[0] = ap[25]; +} + diff --git a/gcc/testsuite/gcc.target/sh/pr50751-6.c b/gcc/testsuite/gcc.target/sh/pr50751-6.c new file mode 100644 index 0000000..83fb5ab --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr50751-6.c @@ -0,0 +1,26 @@ +/* Check that on SH2A the 4 byte mov.w displacement insn is generated to + handle larger displacements. If it is generated correctly, there should + be no base address adjustments outside the mov.w insns. */ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-O1" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a*" } } */ +/* { dg-final { scan-assembler-not "add|sub" } } */ + +void +testfunc_00 (const short* ap, short* bp) +{ + bp[100] = ap[15]; + bp[200] = ap[50]; + bp[900] = ap[71]; + bp[0] = ap[25]; +} + +void +testfunc_01 (volatile const short* ap, volatile short* bp) +{ + bp[100] = ap[15]; + bp[200] = ap[50]; + bp[900] = ap[71]; + bp[0] = ap[25]; +} + diff --git a/gcc/testsuite/gcc.target/sh/pr50751-7.c b/gcc/testsuite/gcc.target/sh/pr50751-7.c new file mode 100644 index 0000000..859cba4 --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr50751-7.c @@ -0,0 +1,35 @@ +/* Check that mov.b and mov.w displacement insns are generated. + If this is working properly, there should be no base address adjustments + outside the mov insns. */ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-O1" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */ +/* { dg-final { scan-assembler-not "add|sub" } } */ + +typedef struct +{ + char a; + char b; + char c; + char d; + + short e; + short f; + + int g; + int h; +} X; + +void +testfunc_00 (X* x) +{ + x->g = x->b | x->c; + x->h = x->e | x->f; + x->d = x->g; + x->f = x->h; +} + +int testfunc_01 (X* x) +{ + return x->b | x->e | x->g; +} |