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author | Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> | 2012-07-26 09:37:38 +0000 |
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committer | Ramana Radhakrishnan <ramana@gcc.gnu.org> | 2012-07-26 09:37:38 +0000 |
commit | da7d74c253ffa8e7849c9186ef62234a02bc6855 (patch) | |
tree | c7e50f1a6dda9e06081f01793482a4f3041e6728 /gcc | |
parent | b63b1f862611aa41662d7cd7027d040dc6682f57 (diff) | |
download | gcc-da7d74c253ffa8e7849c9186ef62234a02bc6855.zip gcc-da7d74c253ffa8e7849c9186ef62234a02bc6855.tar.gz gcc-da7d74c253ffa8e7849c9186ef62234a02bc6855.tar.bz2 |
neon.ml (ops): Fix regexp for vld1Q_dups64 and vld1Q_dupu64 tests.
2012-07-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and
vld1Q_dupu64 tests.
2012-07-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate.
* gcc.target/arm/neon/vld1Q_dups64.c: Likewise.
From-SVN: r189884
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/arm/neon.ml | 4 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c | 2 |
5 files changed, 15 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c0550c5..55075a4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-07-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + * config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and + vld1Q_dupu64 tests. + 2012-07-26 Oleg Endo <olegendo@gcc.gnu.org> PR target/51244 diff --git a/gcc/config/arm/neon.ml b/gcc/config/arm/neon.ml index 24829f2..56869c0 100644 --- a/gcc/config/arm/neon.ml +++ b/gcc/config/arm/neon.ml @@ -1445,8 +1445,10 @@ let ops = CstPtrTo Corereg |]]], Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup", bits_1, pf_su_8_32; + (* Treated identically to vld1_dup above as we now + do a single load followed by a duplicate. *) Vldx_dup 1, - [Disassembles_as [Use_operands [| VecArray (2, Dreg); + [Disassembles_as [Use_operands [| VecArray (1, Dreg); CstPtrTo Corereg |]]], Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup", bits_1, [S64; U64]; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 254bf80..bc12992 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2012-07-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + * gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate. + * gcc.target/arm/neon/vld1Q_dups64.c: Likewise. + 2012-07-26 Mikael Morin <mikael@gcc.gnu.org> PR fortran/44354 diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c index 912b93d..4fceee8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c @@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void) out_int64x2_t = vld1q_dup_s64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c index 234db40..ef0a382 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c @@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void) out_uint64x2_t = vld1q_dup_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ |