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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2014-02-05 23:54:57 +0000 |
|---|---|---|
| committer | William Schmidt <wschmidt@gcc.gnu.org> | 2014-02-05 23:54:57 +0000 |
| commit | d85f364c76ffb97e21b46281a356aeb378228d32 (patch) | |
| tree | df728f693888e7d2fa3c169331d7445ff71595d9 /gcc | |
| parent | 7ec4847ad4718e70f20099a43ab79ffc6dc2a758 (diff) | |
| download | gcc-d85f364c76ffb97e21b46281a356aeb378228d32.zip gcc-d85f364c76ffb97e21b46281a356aeb378228d32.tar.gz gcc-d85f364c76ffb97e21b46281a356aeb378228d32.tar.bz2 | |
rs6000.c (altivec_expand_vec_perm_const): Change CODE_FOR_altivec_vpku[hw]um to CODE_FOR_altivec_vpku[hw]um_direct.
2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Change
CODE_FOR_altivec_vpku[hw]um to
CODE_FOR_altivec_vpku[hw]um_direct.
* config/rs6000/altivec.md (vec_unpacks_hi_<VP_small_lc>): Change
UNSPEC_VUNPACK_HI_SIGN to UNSPEC_VUNPACK_HI_SIGN_DIRECT.
(vec_unpacks_lo_<VP_small_lc>): Change UNSPEC_VUNPACK_LO_SIGN to
UNSPEC_VUNPACK_LO_SIGN_DIRECT.
From-SVN: r207525
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/rs6000/altivec.md | 4 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 8 |
3 files changed, 16 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8bfc47a..2dbab72 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,15 @@ 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Change + CODE_FOR_altivec_vpku[hw]um to + CODE_FOR_altivec_vpku[hw]um_direct. + * config/rs6000/altivec.md (vec_unpacks_hi_<VP_small_lc>): Change + UNSPEC_VUNPACK_HI_SIGN to UNSPEC_VUNPACK_HI_SIGN_DIRECT. + (vec_unpacks_lo_<VP_small_lc>): Change UNSPEC_VUNPACK_LO_SIGN to + UNSPEC_VUNPACK_LO_SIGN_DIRECT. + +2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + * config/rs6000/altivec.md (altivec_vsum2sws): Adjust code generation for -maltivec=be. (altivec_vsumsws): Simplify redundant test. diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index c6d5eae..af6766b 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -2566,14 +2566,14 @@ (define_expand "vec_unpacks_hi_<VP_small_lc>" [(set (match_operand:VP 0 "register_operand" "=v") (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")] - UNSPEC_VUNPACK_HI_SIGN))] + UNSPEC_VUNPACK_HI_SIGN_DIRECT))] "<VI_unit>" "") (define_expand "vec_unpacks_lo_<VP_small_lc>" [(set (match_operand:VP 0 "register_operand" "=v") (unspec:VP [(match_operand:<VP_small> 1 "register_operand" "v")] - UNSPEC_VUNPACK_LO_SIGN))] + UNSPEC_VUNPACK_LO_SIGN_DIRECT))] "<VI_unit>" "") diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index be4c005..fd45bd1 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -29888,9 +29888,9 @@ altivec_expand_vec_perm_const (rtx operands[4]) unsigned char perm[16]; }; static const struct altivec_perm_insn patterns[] = { - { OPTION_MASK_ALTIVEC, CODE_FOR_altivec_vpkuhum, + { OPTION_MASK_ALTIVEC, CODE_FOR_altivec_vpkuhum_direct, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 } }, - { OPTION_MASK_ALTIVEC, CODE_FOR_altivec_vpkuwum, + { OPTION_MASK_ALTIVEC, CODE_FOR_altivec_vpkuwum_direct, { 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 } }, { OPTION_MASK_ALTIVEC, (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrghb_direct @@ -30055,14 +30055,14 @@ altivec_expand_vec_perm_const (rtx operands[4]) halfwords (BE numbering) when the even halfwords (LE numbering) are what we need. */ if (!BYTES_BIG_ENDIAN - && icode == CODE_FOR_altivec_vpkuwum + && icode == CODE_FOR_altivec_vpkuwum_direct && ((GET_CODE (op0) == REG && GET_MODE (op0) != V4SImode) || (GET_CODE (op0) == SUBREG && GET_MODE (XEXP (op0, 0)) != V4SImode))) continue; if (!BYTES_BIG_ENDIAN - && icode == CODE_FOR_altivec_vpkuhum + && icode == CODE_FOR_altivec_vpkuhum_direct && ((GET_CODE (op0) == REG && GET_MODE (op0) != V8HImode) || (GET_CODE (op0) == SUBREG |