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| author | Nick Clifton <nickc@redhat.com> | 2011-03-10 11:25:02 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@gcc.gnu.org> | 2011-03-10 11:25:02 +0000 |
| commit | d845b2f96f63a86cd45e884acaec6e6ba5861335 (patch) | |
| tree | 0481d05667b9f3151b15ed464c91e8a1e3373da2 /gcc | |
| parent | 25d5c0b020e1a3e3ab76463300fcdfc5e08f10fe (diff) | |
| download | gcc-d845b2f96f63a86cd45e884acaec6e6ba5861335.zip gcc-d845b2f96f63a86cd45e884acaec6e6ba5861335.tar.gz gcc-d845b2f96f63a86cd45e884acaec6e6ba5861335.tar.bz2 | |
* config/rx/rx.md (bitset_in_memory, bitclr_in_memory: Fix timings.
From-SVN: r170845
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/rx/rx.md | 13 |
2 files changed, 15 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ca24623..8adc5a4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2011-03-10 Nick Clifton <nickc@redhat.com> + + * config/rx/rx.md (bitset_in_memory, bitclr_in_memory: Fix timings. + 2011-03-09 Jakub Jelinek <jakub@redhat.com> PR rtl-optimization/47866 diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index 7629a88..c8b95d0 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -1643,7 +1643,7 @@ "" "bset\t%1, %0.B" [(set_attr "length" "3") - (set_attr "timings" "34")] + (set_attr "timings" "33")] ) (define_insn "*bitinvert" @@ -1689,7 +1689,7 @@ "" "bclr\t%1, %0.B" [(set_attr "length" "3") - (set_attr "timings" "34")] + (set_attr "timings" "33")] ) (define_insn "*insv_imm" @@ -1897,6 +1897,14 @@ rtx addr2 = gen_rtx_REG (SImode, 2); rtx len = gen_rtx_REG (SImode, 3); + /* Do not use when the source or destination are volatile - the SMOVF + instruction will read and write in word sized blocks, which may be + outside of the valid address range. */ + if (MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0])) + FAIL; + if (MEM_P (operands[1]) && MEM_VOLATILE_P (operands[1])) + FAIL; + if (REG_P (operands[0]) && (REGNO (operands[0]) == 2 || REGNO (operands[0]) == 3)) FAIL; @@ -1906,6 +1914,7 @@ if (REG_P (operands[2]) && (REGNO (operands[2]) == 1 || REGNO (operands[2]) == 2)) FAIL; + emit_move_insn (addr1, force_operand (XEXP (operands[0], 0), NULL_RTX)); emit_move_insn (addr2, force_operand (XEXP (operands[1], 0), NULL_RTX)); emit_move_insn (len, force_operand (operands[2], NULL_RTX)); |