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| author | Uros Bizjak <ubizjak@gmail.com> | 2020-04-15 17:08:07 +0200 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2020-04-15 17:08:07 +0200 |
| commit | d4f655724c6e19ef0aeb5ac9e8d04abd962ccde7 (patch) | |
| tree | 10b5dcbcc04e77357a67bd2c427f16b1af6663c6 /gcc | |
| parent | c00568f376078129196740d83946d54dc5437401 (diff) | |
| download | gcc-d4f655724c6e19ef0aeb5ac9e8d04abd962ccde7.zip gcc-d4f655724c6e19ef0aeb5ac9e8d04abd962ccde7.tar.gz gcc-d4f655724c6e19ef0aeb5ac9e8d04abd962ccde7.tar.bz2 | |
i386: Require OPTION_MASK_ISA_SSE2 for __builtin_ia32_movq128 [PR94603]
PR target/94603
* config/i386/i386-builtin.def (__builtin_ia32_movq128):
Require OPTION_MASK_ISA_SSE2.
testsuite/ChangeLog:
PR target/94603
* gcc.target/i386/pr94603.c: New test.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/i386-builtin.def | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr94603.c | 11 |
4 files changed, 23 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6148a82..ae08fbe 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2020-04-15 Uroš Bizjak <ubizjak@gmail.com> + + PR target/94603 + * config/i386/i386-builtin.def (__builtin_ia32_movq128): + Require OPTION_MASK_ISA_SSE2. + 2020-04-15 Gustavo Romero <gromero@linux.ibm.com> PR bootstrap/89494 diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index bae561b..4d5863c 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -811,7 +811,7 @@ BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_pshufhw, "__builtin_ia32_pshufhw", BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_vmsqrtv2df2, "__builtin_ia32_sqrtsd", IX86_BUILTIN_SQRTSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_VEC_MERGE) -BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI) +BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI) /* SSE2 MMX */ BDESC (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_MMX, 0, CODE_FOR_mmx_addv1di3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e4fc221..8181e9d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-04-15 Uroš Bizjak <ubizjak@gmail.com> + + PR target/94603 + * gcc.target/i386/pr94603.c: New test. + 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com> Srinath Parvathaneni <srinath.parvathaneni@arm.com> diff --git a/gcc/testsuite/gcc.target/i386/pr94603.c b/gcc/testsuite/gcc.target/i386/pr94603.c new file mode 100644 index 0000000..34a1e06 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr94603.c @@ -0,0 +1,11 @@ +/* PR target/94603 */ +/* { dg-do compile } */ +/* { dg-options "-Wno-implicit-function-declaration -msse -mno-sse2" } */ + +typedef long long __attribute__ ((__vector_size__ (16))) V; + +V +foo (V v) +{ + return __builtin_ia32_movq128 (v); /* { dg-error "" } */ +} |