aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorH.J. Lu <hongjiu.lu@intel.com>2011-06-20 14:53:48 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2011-06-20 07:53:48 -0700
commitd1e32c4a411c4a216b7d80e56da2b8a73197505e (patch)
tree50bddf0089eeec9e64b85925a09e2f1a635b73ca /gcc
parentb028af11640a2a31c267b73cc40a9b162632a7d0 (diff)
downloadgcc-d1e32c4a411c4a216b7d80e56da2b8a73197505e.zip
gcc-d1e32c4a411c4a216b7d80e56da2b8a73197505e.tar.gz
gcc-d1e32c4a411c4a216b7d80e56da2b8a73197505e.tar.bz2
Check zero/sign extended hard registers.
2011-06-20 H.J. Lu <hongjiu.lu@intel.com> PR middle-end/47725 * combine.c (cant_combine_insn_p): Check zero/sign extended hard registers. From-SVN: r175218
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/combine.c6
2 files changed, 12 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index aa9449b..a4b5faf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR middle-end/47725
+ * combine.c (cant_combine_insn_p): Check zero/sign extended
+ hard registers.
+
2011-06-20 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
PR target/49385
diff --git a/gcc/combine.c b/gcc/combine.c
index 56fb44e..004ae27 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -2168,6 +2168,12 @@ cant_combine_insn_p (rtx insn)
return 0;
src = SET_SRC (set);
dest = SET_DEST (set);
+ if (GET_CODE (src) == ZERO_EXTEND
+ || GET_CODE (src) == SIGN_EXTEND)
+ src = XEXP (src, 0);
+ if (GET_CODE (dest) == ZERO_EXTEND
+ || GET_CODE (dest) == SIGN_EXTEND)
+ dest = XEXP (dest, 0);
if (GET_CODE (src) == SUBREG)
src = SUBREG_REG (src);
if (GET_CODE (dest) == SUBREG)