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| author | Kewen Lin <linkw@linux.ibm.com> | 2024-01-09 23:06:12 -0600 |
|---|---|---|
| committer | Kewen Lin <linkw@linux.ibm.com> | 2024-01-09 23:06:12 -0600 |
| commit | cf5f6a048e376ab0d2f7bc283c158605e1166061 (patch) | |
| tree | 6ededcb04d748e8ff5b0c37f433a500698d93882 /gcc | |
| parent | cb62101787555b7b32607b431fdfe6fcc8f3830f (diff) | |
| download | gcc-cf5f6a048e376ab0d2f7bc283c158605e1166061.zip gcc-cf5f6a048e376ab0d2f7bc283c158605e1166061.tar.gz gcc-cf5f6a048e376ab0d2f7bc283c158605e1166061.tar.bz2 | |
rs6000: Make copysign (x, -1) back to -abs (x) for IEEE128 float [PR112606]
I noticed that commit r14-6192 can't help PR112606 #c3 as
it only takes care of SF/DF but TF/KF can still suffer the
issue. Similar to commit r14-6192, this patch is to take
care of copysign<mode>3 with IEEE128 as well.
PR target/112606
gcc/ChangeLog:
* config/rs6000/rs6000.md (copysign<mode>3 IEEE128): Change predicate
of the last argument from altivec_register_operand to any_operand. If
operands[2] is CONST_DOUBLE, emit abs or neg abs depending on its sign
otherwise if it doesn't satisfy altivec_register_operand, force it to
REG using copy_to_mode_reg.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index c880cec..bc8bc6a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -15020,9 +15020,27 @@ (define_expand "copysign<mode>3" [(use (match_operand:IEEE128 0 "altivec_register_operand")) (use (match_operand:IEEE128 1 "altivec_register_operand")) - (use (match_operand:IEEE128 2 "altivec_register_operand"))] + (use (match_operand:IEEE128 2 "any_operand"))] "FLOAT128_IEEE_P (<MODE>mode)" { + /* Middle-end canonicalizes -fabs (x) to copysign (x, -1), + but PowerPC prefers -fabs (x). */ + if (CONST_DOUBLE_AS_FLOAT_P (operands[2])) + { + if (real_isneg (CONST_DOUBLE_REAL_VALUE (operands[2]))) + { + rtx abs_res = gen_reg_rtx (<MODE>mode); + emit_insn (gen_abs<mode>2 (abs_res, operands[1])); + emit_insn (gen_neg<mode>2 (operands[0], abs_res)); + } + else + emit_insn (gen_abs<mode>2 (operands[0], operands[1])); + DONE; + } + + if (!altivec_register_operand (operands[2], <MODE>mode)) + operands[2] = copy_to_mode_reg (<MODE>mode, operands[2]); + if (TARGET_FLOAT128_HW) emit_insn (gen_copysign<mode>3_hard (operands[0], operands[1], operands[2])); |