aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorUros Bizjak <uros@gcc.gnu.org>2012-09-12 21:25:13 +0200
committerUros Bizjak <uros@gcc.gnu.org>2012-09-12 21:25:13 +0200
commitcb261eb7275388a6a96a4cb388dee97274e05c45 (patch)
tree4d9304894d1d1e9948feeb9b8bbc99d0b3614239 /gcc
parent9691b9a7d3a49a601a826f8a07b86f83e94b065a (diff)
downloadgcc-cb261eb7275388a6a96a4cb388dee97274e05c45.zip
gcc-cb261eb7275388a6a96a4cb388dee97274e05c45.tar.gz
gcc-cb261eb7275388a6a96a4cb388dee97274e05c45.tar.bz2
i386.c (x86_prefetch_sse): Change to unsigned char.
* config/i386/i386.c (x86_prefetch_sse): Change to unsigned char. * config/i386/i386.h (x86_prefetch_sse): Ditto. From-SVN: r191231
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog10
-rw-r--r--gcc/config/i386/i386.c4
-rw-r--r--gcc/config/i386/i386.h3
3 files changed, 10 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a7b950a..8b35ab4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-09-12 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (x86_prefetch_sse): Change to unsigned char.
+ * config/i386/i386.h (x86_prefetch_sse): Ditto.
+
2012-09-12 H.J. Lu <hongjiu.lu@intel.com>
PR target/54445
@@ -11,9 +16,8 @@
2012-09-12 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
- * config/i386/i386.md : Comments on fma4 instruction
- selection reflect requirement on register pressure based
- cost model.
+ * config/i386/i386.md : Comments on fma4 instruction selection
+ reflect requirement on register pressure based cost model.
* config/i386/driver-i386.c (host_detect_local_cpu): fma4
flag is set-reset as informed by the cpuid flag.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 69a3377..63dde81 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2517,8 +2517,8 @@ enum processor_type ix86_tune;
/* Which instruction set architecture to use. */
enum processor_type ix86_arch;
-/* true if sse prefetch instruction is not NOOP. */
-int x86_prefetch_sse;
+/* True if processor has SSE prefetch instruction. */
+unsigned char x86_prefetch_sse;
/* -mstackrealign option */
static const char ix86_force_align_arg_pointer_string[]
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 53ca7a5..2e70952 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -458,8 +458,7 @@ extern unsigned char ix86_arch_features[X86_ARCH_LAST];
#define TARGET_FISTTP (TARGET_SSE3 && TARGET_80387)
-extern int x86_prefetch_sse;
-
+extern unsigned char x86_prefetch_sse;
#define TARGET_PREFETCH_SSE x86_prefetch_sse
#define ASSEMBLER_DIALECT (ix86_asm_dialect)