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| author | Richard Sandiford <rsandifo@redhat.com> | 2004-03-01 18:17:35 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2004-03-01 18:17:35 +0000 |
| commit | c9e0ce371610049698e7af2a065ddea2ede63709 (patch) | |
| tree | 56c64be2c0d31a73e383b47141548fad6360b0ae /gcc | |
| parent | 6728336267457f71da6261ab59e3fedd4f987d8d (diff) | |
| download | gcc-c9e0ce371610049698e7af2a065ddea2ede63709.zip gcc-c9e0ce371610049698e7af2a065ddea2ede63709.tar.gz gcc-c9e0ce371610049698e7af2a065ddea2ede63709.tar.bz2 | |
mips.c (mips_output_division): Use the division instruction to fill the delay slot of a zero check.
* config/mips/mips.c (mips_output_division): Use the division
instruction to fill the delay slot of a zero check.
(mips_idiv_insns): Adjust accordingly.
From-SVN: r78712
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 23 |
2 files changed, 18 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 266145c..512467b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2004-03-01 Richard Sandiford <rsandifo@redhat.com> + + * config/mips/mips.c (mips_output_division): Use the division + instruction to fill the delay slot of a zero check. + (mips_idiv_insns): Adjust accordingly. + 2004-03-01 Nathanael Nerode <neroden@gcc.gnu.org> * config.gcc: Create a default tmake_file for linux, and use diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 8fdd979..c200af7 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1359,12 +1359,7 @@ mips_idiv_insns (void) count = 1; if (TARGET_CHECK_ZERO_DIV) - { - if (TARGET_MIPS16) - count += 2; - else - count += 3; - } + count += 2; if (TARGET_FIX_R4000) count++; return count; @@ -9225,16 +9220,22 @@ mips_output_conditional_branch (rtx insn, rtx *operands, int two_operands_p, const char * mips_output_division (const char *division, rtx *operands) { - const char *s = division; + const char *s; + s = division; if (TARGET_CHECK_ZERO_DIV) { - output_asm_insn (s, operands); - if (TARGET_MIPS16) - s = "bnez\t%2,1f\n\tbreak\t7\n1:"; + { + output_asm_insn (s, operands); + s = "bnez\t%2,1f\n\tbreak\t7\n1:"; + } else - s = "bne\t%2,%.,1f%#\n\tbreak\t7\n1:"; + { + output_asm_insn ("%(bne\t%2,%.,1f", operands); + output_asm_insn (s, operands); + s = "break\t7%)\n1:"; + } } if (TARGET_FIX_R4000) { |