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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2019-07-25 11:04:21 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2019-07-25 11:04:21 +0000 |
| commit | c9357dc13bdc10df1eba95d7b79ee2d3ae4fbbc6 (patch) | |
| tree | da7d8a82739ef3c998f69a22167e33627879881b /gcc | |
| parent | 0982acbe282ded53440acdc8b6475f5bc5fb6a9d (diff) | |
| download | gcc-c9357dc13bdc10df1eba95d7b79ee2d3ae4fbbc6.zip gcc-c9357dc13bdc10df1eba95d7b79ee2d3ae4fbbc6.tar.gz gcc-c9357dc13bdc10df1eba95d7b79ee2d3ae4fbbc6.tar.bz2 | |
[arm][committed] Clean up code iterator usage in satsi* patterns
GCC 10 now supports having RTL codes being code attributes (thanks
Richard) allowing us to map smax to smin and vice versa.
This means we can clean up their use in the saturation patterns that do
the cross product of [smin, smax] and use the pattern
predicate to cancel out the nonsense ones.
* config/arm/arm.md (SATrev): Change to code attribute.
(*satsi_<SAT:code>): Adjust for the above.
(*satsi_<SAT:code>_shift): Likewise.
From-SVN: r273796
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 10 |
2 files changed, 11 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 26f60f2..05c8263 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-07-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (SATrev): Change to code attribute. + (*satsi_<SAT:code>): Adjust for the above. + (*satsi_<SAT:code>_shift): Likewise. + 2019-07-25 Richard Biener <rguenther@suse.de> * gimple-loop-versioning.cc (loop_versioning::prune_loop_conditions): diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index dcb5737..7ab939a 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3981,16 +3981,16 @@ ) (define_code_iterator SAT [smin smax]) -(define_code_iterator SATrev [smin smax]) +(define_code_attr SATrev [(smin "smax") (smax "smin")]) (define_code_attr SATlo [(smin "1") (smax "2")]) (define_code_attr SAThi [(smin "2") (smax "1")]) (define_insn "*satsi_<SAT:code>" [(set (match_operand:SI 0 "s_register_operand" "=r") - (SAT:SI (SATrev:SI (match_operand:SI 3 "s_register_operand" "r") + (SAT:SI (<SATrev>:SI (match_operand:SI 3 "s_register_operand" "r") (match_operand:SI 1 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i")))] - "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE> + "TARGET_32BIT && arm_arch6 && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)" { int mask; @@ -4011,12 +4011,12 @@ (define_insn "*satsi_<SAT:code>_shift" [(set (match_operand:SI 0 "s_register_operand" "=r") - (SAT:SI (SATrev:SI (match_operator:SI 3 "sat_shift_operator" + (SAT:SI (<SATrev>:SI (match_operator:SI 3 "sat_shift_operator" [(match_operand:SI 4 "s_register_operand" "r") (match_operand:SI 5 "const_int_operand" "i")]) (match_operand:SI 1 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i")))] - "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE> + "TARGET_32BIT && arm_arch6 && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)" { int mask; |