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| author | Andrew Pinski <apinski@cavium.com> | 2012-07-21 11:05:04 +0000 |
|---|---|---|
| committer | Andrew Pinski <pinskia@gcc.gnu.org> | 2012-07-21 04:05:04 -0700 |
| commit | c55963ebd6b75545dc9f79fd081c596ef5cbe568 (patch) | |
| tree | 45658fb05b44ae2d9ddf0eaed39c4ab15e524137 /gcc | |
| parent | 63fbf5865a5fc48a25ff4410e7c2757bb24c36c8 (diff) | |
| download | gcc-c55963ebd6b75545dc9f79fd081c596ef5cbe568.zip gcc-c55963ebd6b75545dc9f79fd081c596ef5cbe568.tar.gz gcc-c55963ebd6b75545dc9f79fd081c596ef5cbe568.tar.bz2 | |
mips.md (*popcountdi2_trunc): New pattern to handle popcount of a truncation.
2012-07-21 Andrew Pinski <apinski@cavium.com>
* config/mips/mips.md (*popcountdi2_trunc): New pattern
to handle popcount of a truncation.
2012-07-21 Andrew Pinski <apinski@cavium.com>
* gcc.target/mips/octeon-pop-2.c: New testcase.
From-SVN: r189744
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/octeon-pop-2.c | 10 |
4 files changed, 29 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4027766..a2838d7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2012-07-21 Andrew Pinski <apinski@cavium.com> + * config/mips/mips.md (*popcountdi2_trunc): New pattern + to handle popcount of a truncation. + +2012-07-21 Andrew Pinski <apinski@cavium.com> + * config/mips/mips-protos.h (mips_expand_ext_as_unaligned_load): Add a bool argument. * config/mips/mips.c (mips_block_move_straight): Update call to diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 0edc9d9..af741ba 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -2643,6 +2643,16 @@ "<d>pop\t%0,%1" [(set_attr "type" "pop") (set_attr "mode" "<MODE>")]) + +;; The POP instruction is special as it does not take into account the upper +;; 32bits and is documented that way. +(define_insn "*popcountdi2_trunc" + [(set (match_operand:SI 0 "register_operand" "=d") + (popcount:SI (truncate:SI (match_operand:DI 1 "register_operand" "d"))))] + "ISA_HAS_POP && TARGET_64BIT" + "pop\t%0,%1" + [(set_attr "type" "pop") + (set_attr "mode" "SI")]) ;; ;; .................... diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 75aa114..3dd4fb8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2012-07-21 Andrew Pinski <apinski@cavium.com> + + * gcc.target/mips/octeon-pop-2.c: New testcase. + 2012-07-21 Tobias Burnus <burnus@net-b.de> PR fortran/48820 diff --git a/gcc/testsuite/gcc.target/mips/octeon-pop-2.c b/gcc/testsuite/gcc.target/mips/octeon-pop-2.c new file mode 100644 index 0000000..8acd935 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/octeon-pop-2.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O -march=octeon -mgp64" } */ +/* The pop instruction does not depend on the word value to be sign extended. */ +/* { dg-final { scan-assembler-not "sll\t" } } */ + +long long f(long long i) +{ + return __builtin_popcount (i); +} + |