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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2016-05-24 23:19:08 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2016-05-24 23:19:08 +0000 |
| commit | c3eaf15aae68a4cc3e01a6ece4408188b73073ff (patch) | |
| tree | e850d4481f91822e6b72a518e5ba3e5c8560c73f /gcc | |
| parent | e46c777050aad8088ffdc7edcfea7deefc38de21 (diff) | |
| download | gcc-c3eaf15aae68a4cc3e01a6ece4408188b73073ff.zip gcc-c3eaf15aae68a4cc3e01a6ece4408188b73073ff.tar.gz gcc-c3eaf15aae68a4cc3e01a6ece4408188b73073ff.tar.bz2 | |
altivec.md (VNEG iterator): New iterator for VNEGW/VNEGD instructions.
[gcc]
2016-05-24 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/altivec.md (VNEG iterator): New iterator for
VNEGW/VNEGD instructions.
(p9_neg<mode>2): New insns for ISA 3.0 VNEGW/VNEGD.
(neg<mode>2): Add expander for V2DImode added in ISA 2.06, and
support for ISA 3.0 VNEGW/VNEGD instructions.
[gcc/testsuite]
2016-05-24 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p9-vneg.c: New test for ISA 3.0 VNEGW/VNEGD
instructions.
From-SVN: r236679
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/altivec.md | 33 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/p9-vneg.c | 12 |
4 files changed, 47 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 57e9ba1..8b0a504 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2016-05-24 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (VNEG iterator): New iterator for + VNEGW/VNEGD instructions. + (p9_neg<mode>2): New insns for ISA 3.0 VNEGW/VNEGD. + (neg<mode>2): Add expander for V2DImode added in ISA 2.06, and + support for ISA 3.0 VNEGW/VNEGD instructions. + 2016-05-24 Cesar Philippidis <cesar@codesourcery.com> * gimplify.c (omp_notice_variable): Use zero-length arrays for data diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 03ae1d9..4397cbc 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -214,6 +214,9 @@ (define_mode_attr VP_small_lc [(V2DI "v4si") (V4SI "v8hi") (V8HI "v16qi")]) (define_mode_attr VU_char [(V2DI "w") (V4SI "h") (V8HI "b")]) +;; Vector negate +(define_mode_iterator VNEG [V4SI V2DI]) + ;; Vector move instructions. (define_insn "*altivec_mov<mode>" [(set (match_operand:VM2 0 "nonimmediate_operand" "=Z,v,v,*Y,*r,*r,v,v,*r") @@ -2761,20 +2764,28 @@ DONE; }) +(define_insn "*p9_neg<mode>2" + [(set (match_operand:VNEG 0 "altivec_register_operand" "=v") + (neg:VNEG (match_operand:VNEG 1 "altivec_register_operand" "v")))] + "TARGET_P9_VECTOR" + "vneg<VI_char> %0,%1" + [(set_attr "type" "vecsimple")]) + (define_expand "neg<mode>2" - [(use (match_operand:VI 0 "register_operand" "")) - (use (match_operand:VI 1 "register_operand" ""))] - "TARGET_ALTIVEC" - " + [(set (match_operand:VI2 0 "register_operand" "") + (neg:VI2 (match_operand:VI2 1 "register_operand" "")))] + "<VI_unit>" { - rtx vzero; + if (!TARGET_P9_VECTOR || (<MODE>mode != V4SImode && <MODE>mode != V2DImode)) + { + rtx vzero; - vzero = gen_reg_rtx (GET_MODE (operands[0])); - emit_insn (gen_altivec_vspltis<VI_char> (vzero, const0_rtx)); - emit_insn (gen_sub<mode>3 (operands[0], vzero, operands[1])); - - DONE; -}") + vzero = gen_reg_rtx (GET_MODE (operands[0])); + emit_move_insn (vzero, CONST0_RTX (<MODE>mode)); + emit_insn (gen_sub<mode>3 (operands[0], vzero, operands[1])); + DONE; + } +}) (define_expand "udot_prod<mode>" [(set (match_operand:V4SI 0 "register_operand" "=v") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index bb082a1..c5c1e3b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-05-24 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/p9-vneg.c: New test for ISA 3.0 VNEGW/VNEGD + instructions. + 2016-05-24 Cesar Philippidis <cesar@codesourcery.com> * c-c++-common/goacc/data-clause-duplicate-1.c: Adjust test. diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vneg.c b/gcc/testsuite/gcc.target/powerpc/p9-vneg.c new file mode 100644 index 0000000..10041c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-vneg.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target { powerpc64*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +/* Verify P9 vector negate instructions. */ + +vector long long v2di_neg (vector long long a) { return -a; } +vector int v4si_neg (vector int a) { return -a; } + +/* { dg-final { scan-assembler "vnegd" } } */ +/* { dg-final { scan-assembler "vnegw" } } */ |