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| author | Jan Beulich <jbeulich@suse.com> | 2019-06-28 13:19:51 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@gcc.gnu.org> | 2019-06-28 13:19:51 +0000 |
| commit | c0569d342ca43a2e90f1fd823dada3364705e5a9 (patch) | |
| tree | 8706fa08cc3fc99cf86aa5f4cd8ad453f04534e6 /gcc | |
| parent | 807c3ab51dfdd010dafa6c3ce5083f86d251e62c (diff) | |
| download | gcc-c0569d342ca43a2e90f1fd823dada3364705e5a9.zip gcc-c0569d342ca43a2e90f1fd823dada3364705e5a9.tar.gz gcc-c0569d342ca43a2e90f1fd823dada3364705e5a9.tar.bz2 | |
x86: fix vgf2p8affine*qb insns
The affine transformations are not commutative (the two source operands
have entirely different meaning).
Also the nonimmediate_operand predicate can better be vector_operand.
From-SVN: r272783
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 8 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/gfni-5.c | 19 |
4 files changed, 33 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6f028eee..f30fedc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-06-28 Jan Beulich <jbeulich@suse.com> + + * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>, + vgf2p8affineqb_<mode><mask_name>): Drop % constraint modifier. + Use vector_operand. + 2019-06-28 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc.c (arc_rtx_costs): All short instructions are diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 1546817..713e3c8 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -22112,8 +22112,8 @@ (define_insn "vgf2p8affineinvqb_<mode><mask_name>" [(set (match_operand:VI1_AVX512F 0 "register_operand" "=x,x,v") (unspec:VI1_AVX512F - [(match_operand:VI1_AVX512F 1 "register_operand" "%0,x,v") - (match_operand:VI1_AVX512F 2 "nonimmediate_operand" "xBm,xm,vm") + [(match_operand:VI1_AVX512F 1 "register_operand" "0,x,v") + (match_operand:VI1_AVX512F 2 "vector_operand" "xBm,xm,vm") (match_operand:QI 3 "const_0_to_255_operand" "n,n,n")] UNSPEC_GF2P8AFFINEINV))] "TARGET_GFNI" @@ -22130,8 +22130,8 @@ (define_insn "vgf2p8affineqb_<mode><mask_name>" [(set (match_operand:VI1_AVX512F 0 "register_operand" "=x,x,v") (unspec:VI1_AVX512F - [(match_operand:VI1_AVX512F 1 "register_operand" "%0,x,v") - (match_operand:VI1_AVX512F 2 "nonimmediate_operand" "xBm,xm,vm") + [(match_operand:VI1_AVX512F 1 "register_operand" "0,x,v") + (match_operand:VI1_AVX512F 2 "vector_operand" "xBm,xm,vm") (match_operand:QI 3 "const_0_to_255_operand" "n,n,n")] UNSPEC_GF2P8AFFINE))] "TARGET_GFNI" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a1fbb04..a340bc4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2019-06-28 Jan Beulich <jbeulich@suse.com> + * gcc.target/i386/gfni-5.c: New. + +2019-06-28 Jan Beulich <jbeulich@suse.com> + * gcc.target/i386/cvtpd2pi: New. 2019-06-27 Jakub Jelinek <jakub@redhat.com> diff --git a/gcc/testsuite/gcc.target/i386/gfni-5.c b/gcc/testsuite/gcc.target/i386/gfni-5.c new file mode 100644 index 0000000..b355219 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/gfni-5.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mgfni" } */ + +typedef char __attribute__((vector_size(16))) v16qi_t; + +v16qi_t test16a (v16qi_t x, v16qi_t a) +{ + asm volatile ("" : "+m" (a)); + return __builtin_ia32_vgf2p8affineqb_v16qi (x, a, 0); +} + +v16qi_t test16b (v16qi_t x, v16qi_t a) +{ + asm volatile ("" : "+m" (x)); + return __builtin_ia32_vgf2p8affineqb_v16qi (x, a, 0); +} + +/* { dg-final { scan-assembler-times "gf2p8affineqb\[ \t].*\\(" 1 } } */ +/* { dg-final { scan-assembler-times "gf2p8affineqb\[ \t].*%xmm.*%xmm" 1 } } */ |