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author | Hans-Peter Nilsson <hp@axis.com> | 2004-10-13 23:35:03 +0000 |
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committer | Hans-Peter Nilsson <hp@gcc.gnu.org> | 2004-10-13 23:35:03 +0000 |
commit | bf6ac87cc8d6a0c39c88dc78b2263317a6284c00 (patch) | |
tree | a52e9bf56129d0153e5ac5ddade88bd28a7b0fba /gcc | |
parent | 5a78838a41403815e2b68eace9ea59db4baff54e (diff) | |
download | gcc-bf6ac87cc8d6a0c39c88dc78b2263317a6284c00.zip gcc-bf6ac87cc8d6a0c39c88dc78b2263317a6284c00.tar.gz gcc-bf6ac87cc8d6a0c39c88dc78b2263317a6284c00.tar.bz2 |
re PR target/17984 (Recent peephole2:s may cause internal compiler errors (2))
PR target/17984
* config/cris/cris.md (asrandb, asrandw, lsrandb, lsrandw): Apply
trunc_int_for_mode for constants used in shortened mode.
From-SVN: r89011
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/cris/cris.md | 28 |
2 files changed, 26 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 647941c6..036c72f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2004-10-14 Hans-Peter Nilsson <hp@axis.com> + + PR target/17984 + * config/cris/cris.md (asrandb, asrandw, lsrandb, lsrandw): Apply + trunc_int_for_mode for constants used in shortened mode. + 2004-10-13 Richard Henderson <rth@redhat.com> PR c/17384 diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md index 1e925db..d4e4a5a 100644 --- a/gcc/config/cris/cris.md +++ b/gcc/config/cris/cris.md @@ -4717,9 +4717,12 @@ && (INTVAL (operands[2]) & ((HOST_WIDE_INT) -1 << (32 - INTVAL (operands[1])))) == 0" [(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 1))) - (set (match_dup 3) (and:QI (match_dup 3) (match_dup 2)))] + (set (match_dup 3) (and:QI (match_dup 3) (match_dup 4)))] ;; FIXME: CC0 is valid except for the M bit. - "operands[3] = gen_rtx_REG (QImode, REGNO (operands[0]));") +{ + operands[3] = gen_rtx_REG (QImode, REGNO (operands[0])); + operands[4] = GEN_INT (trunc_int_for_mode (INTVAL (operands[2]), QImode)); +}) (define_peephole2 ; asrandw (peephole casesi+32) [(set (match_operand:SI 0 "register_operand" "") @@ -4735,9 +4738,12 @@ && (INTVAL (operands[2]) & ((HOST_WIDE_INT) -1 << (32 - INTVAL (operands[1])))) == 0" [(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 1))) - (set (match_dup 3) (and:HI (match_dup 3) (match_dup 2)))] + (set (match_dup 3) (and:HI (match_dup 3) (match_dup 4)))] ;; FIXME: CC0 is valid except for the M bit. - "operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));") +{ + operands[3] = gen_rtx_REG (HImode, REGNO (operands[0])); + operands[4] = GEN_INT (trunc_int_for_mode (INTVAL (operands[2]), HImode)); +}) (define_peephole2 ; lsrandb (peephole casesi+33) [(set (match_operand:SI 0 "register_operand" "") @@ -4749,9 +4755,12 @@ && INTVAL (operands[2]) < 255 && INTVAL (operands[1]) > 23" [(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 1))) - (set (match_dup 3) (and:QI (match_dup 3) (match_dup 2)))] + (set (match_dup 3) (and:QI (match_dup 3) (match_dup 4)))] ;; FIXME: CC0 is valid except for the M bit. - "operands[3] = gen_rtx_REG (QImode, REGNO (operands[0]));") +{ + operands[3] = gen_rtx_REG (QImode, REGNO (operands[0])); + operands[4] = GEN_INT (trunc_int_for_mode (INTVAL (operands[2]), QImode)); +}) (define_peephole2 ; lsrandw (peephole casesi+34) [(set (match_operand:SI 0 "register_operand" "") @@ -4763,9 +4772,12 @@ && INTVAL (operands[2]) != 255 && INTVAL (operands[1]) > 15" [(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 1))) - (set (match_dup 3) (and:HI (match_dup 3) (match_dup 2)))] + (set (match_dup 3) (and:HI (match_dup 3) (match_dup 4)))] ;; FIXME: CC0 is valid except for the M bit. - "operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));") +{ + operands[3] = gen_rtx_REG (HImode, REGNO (operands[0])); + operands[4] = GEN_INT (trunc_int_for_mode (INTVAL (operands[2]), HImode)); +}) ;; Change |