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author | Richard Stallman <rms@gnu.org> | 1993-06-26 07:44:01 +0000 |
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committer | Richard Stallman <rms@gnu.org> | 1993-06-26 07:44:01 +0000 |
commit | bdec790ce64c6df52dcc818f4d3d87365dfec96e (patch) | |
tree | a8204cb511a6ef46f23fa6203bd5126caf177797 /gcc | |
parent | ae49c611b6894fbc69871367d604ea618dbf66c8 (diff) | |
download | gcc-bdec790ce64c6df52dcc818f4d3d87365dfec96e.zip gcc-bdec790ce64c6df52dcc818f4d3d87365dfec96e.tar.gz gcc-bdec790ce64c6df52dcc818f4d3d87365dfec96e.tar.bz2 |
(output_move_double): Handle reg[n,n+1] = mem[reg[n] + reg[n+1]].
From-SVN: r4742
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/sparc/sparc.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 5ecaa65b..361d332 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1156,8 +1156,19 @@ output_move_double (operands) else if (optype0 == REGOP && optype1 != REGOP && reg_overlap_mentioned_p (op0, op1)) { - /* ??? This fails if the address is a double register address, each - of which is clobbered by operand 0. */ + if (reg_mentioned_p (op0, XEXP (op1, 0)) + && reg_mentioned_p (latehalf[0], XEXP (op1, 0))) + { + /* If both halves of dest are used in the src memory address, + add the two regs and put them in the low reg (op0). + Then it works to load latehalf first. */ + rtx xops[2]; + xops[0] = latehalf[0]; + xops[1] = op0; + output_asm_insn ("add %1,%0,%1", xops); + operands[1] = gen_rtx (MEM, DImode, latehalf[0]); + latehalf[1] = adj_offsettable_operand (operands[1], 4); + } /* Do the late half first. */ output_asm_insn (singlemove_string (latehalf), latehalf); /* Then clobber. */ |