diff options
| author | Jakub Jelinek <jakub@redhat.com> | 2011-09-21 13:39:23 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2011-09-21 13:39:23 +0200 |
| commit | bdbebb7dc6192e428fa9c5ece8de8efb33a7738f (patch) | |
| tree | bb83913dceba0a6362df9c2866eb7b71d3fca3df /gcc | |
| parent | fd1e62c239e732536345e8c6102669923455dd89 (diff) | |
| download | gcc-bdbebb7dc6192e428fa9c5ece8de8efb33a7738f.zip gcc-bdbebb7dc6192e428fa9c5ece8de8efb33a7738f.tar.gz gcc-bdbebb7dc6192e428fa9c5ece8de8efb33a7738f.tar.bz2 | |
sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use nonimmediate_operand instead of register_operand predicate for operands 1...
* config/i386/sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use
nonimmediate_operand instead of register_operand predicate for operands
1 and 2, force them into registers if expanding them as comparison.
(<code><mode>3 umaxmin:VI124_128 expander): Similarly. For UMAX
V8HImode force into register just operand 1.
From-SVN: r179045
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 14 |
2 files changed, 18 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 036fdde..fb80dc9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2011-09-21 Jakub Jelinek <jakub@redhat.com> + + * config/i386/sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use + nonimmediate_operand instead of register_operand predicate for operands + 1 and 2, force them into registers if expanding them as comparison. + (<code><mode>3 umaxmin:VI124_128 expander): Similarly. For UMAX + V8HImode force into register just operand 1. + 2011-09-21 Georg-Johann Lay <avr@gjlay.de> PR target/45099 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 5e1701c..7c15e1a 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -5887,8 +5887,8 @@ (define_expand "<code><mode>3" [(set (match_operand:VI124_128 0 "register_operand" "") - (smaxmin:VI124_128 (match_operand:VI124_128 1 "register_operand" "") - (match_operand:VI124_128 2 "register_operand" "")))] + (smaxmin:VI124_128 (match_operand:VI124_128 1 "nonimmediate_operand" "") + (match_operand:VI124_128 2 "nonimmediate_operand" "")))] "TARGET_SSE2" { if (TARGET_SSE4_1 || <MODE>mode == V8HImode) @@ -5899,6 +5899,8 @@ bool ok; xops[0] = operands[0]; + operands[1] = force_reg (<MODE>mode, operands[1]); + operands[2] = force_reg (<MODE>mode, operands[2]); if (<CODE> == SMAX) { @@ -5954,8 +5956,8 @@ (define_expand "<code><mode>3" [(set (match_operand:VI124_128 0 "register_operand" "") - (umaxmin:VI124_128 (match_operand:VI124_128 1 "register_operand" "") - (match_operand:VI124_128 2 "register_operand" "")))] + (umaxmin:VI124_128 (match_operand:VI124_128 1 "nonimmediate_operand" "") + (match_operand:VI124_128 2 "nonimmediate_operand" "")))] "TARGET_SSE2" { if (TARGET_SSE4_1 || <MODE>mode == V16QImode) @@ -5963,6 +5965,7 @@ else if (<CODE> == UMAX && <MODE>mode == V8HImode) { rtx op0 = operands[0], op2 = operands[2], op3 = op0; + operands[1] = force_reg (<MODE>mode, operands[1]); if (rtx_equal_p (op3, op2)) op3 = gen_reg_rtx (V8HImode); emit_insn (gen_sse2_ussubv8hi3 (op3, operands[1], op2)); @@ -5974,6 +5977,9 @@ rtx xops[6]; bool ok; + operands[1] = force_reg (<MODE>mode, operands[1]); + operands[2] = force_reg (<MODE>mode, operands[2]); + xops[0] = operands[0]; if (<CODE> == UMAX) |