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| author | Paul Brook <paul@codesourcery.com> | 2006-09-27 17:09:40 +0000 |
|---|---|---|
| committer | Paul Brook <pbrook@gcc.gnu.org> | 2006-09-27 17:09:40 +0000 |
| commit | bcf640f76d83f5dcf813b5fca8075291872985eb (patch) | |
| tree | 1a457e50a5ed31f77de836efeab6e0551ee16c3a /gcc | |
| parent | 63a7a62b25dcea2f63b2f50ee7502084ac8991f1 (diff) | |
| download | gcc-bcf640f76d83f5dcf813b5fca8075291872985eb.zip gcc-bcf640f76d83f5dcf813b5fca8075291872985eb.tar.gz gcc-bcf640f76d83f5dcf813b5fca8075291872985eb.tar.bz2 | |
re PR target/29230 (gcc-4.1 generates faulty asm on ARM when compiling openmsx 0.6.1 with -O3)
2006-09-27 Paul Brook <paul@codesourcery.com>
PR target/29230
gcc/
* config/arm/arm.md (arith_adjacentmem): Handle large offsets.
From-SVN: r117253
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 17 |
2 files changed, 19 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 584f6de..856bcb2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2006-09-27 Paul Brook <paul@codesourcery.com> + + PR target/29230 + * config/arm/arm.md (arith_adjacentmem): Handle large offsets. + 2006-09-27 Richard Sandiford <richard@codesourcery.com> * reload1.c (alter_reg): Require the alignment of the stack slot to diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 9abe62c..b28e3d0 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -9508,14 +9508,14 @@ ldm[0] = base_reg; if (val1 !=0 && val2 != 0) { + rtx ops[3]; + if (val1 == 4 || val2 == 4) /* Other val must be 8, since we know they are adjacent and neither is zero. */ output_asm_insn (\"ldm%?ib\\t%0, {%1, %2}\", ldm); - else + else if (const_ok_for_arm (val1) || const_ok_for_arm (-val1)) { - rtx ops[3]; - ldm[0] = ops[0] = operands[4]; ops[1] = base_reg; ops[2] = GEN_INT (val1); @@ -9525,6 +9525,17 @@ else output_asm_insn (\"ldm%?da\\t%0, {%1, %2}\", ldm); } + else + { + /* Offset is out of range for a single add, so use two ldr. */ + ops[0] = ldm[1]; + ops[1] = base_reg; + ops[2] = GEN_INT (val1); + output_asm_insn (\"ldr%?\\t%0, [%1, %2]\", ops); + ops[0] = ldm[2]; + ops[2] = GEN_INT (val2); + output_asm_insn (\"ldr%?\\t%0, [%1, %2]\", ops); + } } else if (val1 != 0) { |