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author | Eric Christopher <echristo@redhat.com> | 2002-04-27 02:33:37 +0000 |
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committer | Eric Christopher <echristo@gcc.gnu.org> | 2002-04-27 02:33:37 +0000 |
commit | b875d2eec1130ad5c4eda5be4674c5e1698ffb19 (patch) | |
tree | a0b956599b5ee5dff042ad2fc7f461ddfbe01111 /gcc | |
parent | cf6a5491cbc6ad143380e447e9c66eca884b36f5 (diff) | |
download | gcc-b875d2eec1130ad5c4eda5be4674c5e1698ffb19.zip gcc-b875d2eec1130ad5c4eda5be4674c5e1698ffb19.tar.gz gcc-b875d2eec1130ad5c4eda5be4674c5e1698ffb19.tar.bz2 |
re PR rtl-optimization/3700 (ISSUE_RATE not defined for mips target)
2002-04-26 Eric Christopher <echristo@redhat.com>
PR optimization/3700
* config/mips/mips.c (mips_issue_rate): Define. New function.
(TARGET_SCHED_ISSUE_RATE): Use.
From-SVN: r52825
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 12 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 23 |
2 files changed, 31 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 70c3795..a9ddd49 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2002-04-26 Eric Christopher <echristo@redhat.com> + + PR optimization/3700 + * config/mips/mips.c (mips_issue_rate): Define. New function. + (TARGET_SCHED_ISSUE_RATE): Use. + 2002-04-25 David S. Miller <davem@redhat.com> PR target/6422 @@ -120,7 +126,7 @@ of the corresponding functions. * mips-protos.h (mips_class_max_nregs, mips_register_move_cost): New prototypes. - + 2002-04-25 Matt Hiller <hiller@redhat.com> * config/mips/mips.h (mips_sw_reg_names): Declare as extern. @@ -134,7 +140,7 @@ for coprocessor registers. (ADDITIONAL_REGISTER_NAMES): Include ALL_COP_ADDITIONAL_REGISTER_NAMES. - + (COP0_REG_FIRST, COP0_REG_LAST, COP0_REG_NUM, COP2_REG_FIRST, COP2_REG_LAST, COP2_REG_NUM, COP3_REG_FIRST, COP3_REG_LAST, COP3_REG_NUM, @@ -172,7 +178,7 @@ * testsuite/gcc.c-torture/mipscop-4.c: New testcase. * testsuite/gcc.c-torture/mipscop-4.x: Disable above if target isn't mips. - + * doc/tm.texi: Document feature. 2002-04-25 Neil Booth <neil@daikokuya.demon.co.uk> diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index a02dc6a..401cbbd 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -143,6 +143,7 @@ static hashval_t iris_section_align_entry_hash PARAMS ((const PTR)); static int iris6_section_align_1 PARAMS ((void **, void *)); #endif static int mips_adjust_cost PARAMS ((rtx, rtx, rtx, int)); +static int mips_issue_rate PARAMS ((void)); static void mips_init_machine_status PARAMS ((struct function *)); static void mips_free_machine_status PARAMS ((struct function *)); @@ -572,6 +573,9 @@ enum reg_class mips_char_to_class[256] = #undef TARGET_SCHED_ADJUST_COST #define TARGET_SCHED_ADJUST_COST mips_adjust_cost +#undef TARGET_SCHED_ISSUE_RATE +#define TARGET_SCHED_ISSUE_RATE mips_issue_rate + struct gcc_target targetm = TARGET_INITIALIZER; /* Return truth value of whether OP can be used as an operands @@ -1976,7 +1980,7 @@ embedded_pic_fnaddr_reg () } return cfun->machine->embedded_pic_fnaddr_rtx; -} +} /* Return RTL for the offset from the current function to the argument. X is the symbol whose offset from the current function we want. */ @@ -10324,7 +10328,24 @@ mips_return_in_memory (type) || (int_size_in_bytes (type) == -1)); } +static int +mips_issue_rate () +{ + int rate; + + switch (mips_tune) + { + case PROCESSOR_R3000: + rate = 1; + break; + + default: + rate = 1; + break; + } + return rate; +} #ifdef TARGET_IRIX6 |