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authorBin Cheng <bin.cheng@arm.com>2013-04-11 03:55:14 +0000
committerBin Cheng <amker@gcc.gnu.org>2013-04-11 03:55:14 +0000
commitb8578ff77f8ea4d23fa5edc2805e1f3625b46c14 (patch)
tree7eed9012cafb0b687b25ff31228c05b0ae1f2dd8 /gcc
parentb0c4c179ae1d6761f6ee7a42f5a58b9338360a7e (diff)
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re PR rtl-optimization/56124 (Redundant reload for loading from memory)
PR target/56124 * ira-costs.c (scan_one_insn): Check whether the source rtx of loading has side effect. From-SVN: r197691
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/ira-costs.c7
2 files changed, 11 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 927a9c0..7e1cc32 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-04-11 Bin Cheng <bin.cheng@arm.com>
+
+ PR target/56124
+ * ira-costs.c (scan_one_insn): Check whether the source rtx of
+ loading has side effect.
+
2013-04-10 Steven Bosscher <steven@gcc.gnu.org>
* config/sparc/sparc.c: Include tree-pass.h.
diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c
index d2806bd..508394e 100644
--- a/gcc/ira-costs.c
+++ b/gcc/ira-costs.c
@@ -1292,10 +1292,13 @@ scan_one_insn (rtx insn)
a memory requiring special instructions to load it, decreasing
mem_cost might result in it being loaded using the specialized
instruction into a register, then stored into stack and loaded
- again from the stack. See PR52208. */
+ again from the stack. See PR52208.
+
+ Don't do this if SET_SRC (set) has side effect. See PR56124. */
if (set != 0 && REG_P (SET_DEST (set)) && MEM_P (SET_SRC (set))
&& (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != NULL_RTX
- && ((MEM_P (XEXP (note, 0)))
+ && ((MEM_P (XEXP (note, 0))
+ && !side_effects_p (SET_SRC (set)))
|| (CONSTANT_P (XEXP (note, 0))
&& targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)),
XEXP (note, 0))