re PR target/36992 (Very stange code for _mm_move_epi64)

gcc/

2008-08-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/36992
	* config/i386/emmintrin.h (_mm_move_epi64): Use
	__builtin_ia32_movq128.

	* config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MOVQ128.
	(bdesc_args): Add IX86_BUILTIN_MOVQ128.

	* config/i386/sse.md (sse2_movq128): New.

	* doc/extend.texi: Document __builtin_ia32_movq128.

gcc/testsuite/

2008-08-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/36992
	* gcc.target/i386/pr36992-1.c: Scan movq.
	* gcc.target/i386/pr36992-2.c: Use "-O2 -msse4" instead of
	"-O0 -msse2".  Scan movq.

From-SVN: r138839

8 files changed, 46 insertions, 9 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 77ab7b7..de3eecd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2008-08-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/36992
+	* config/i386/emmintrin.h (_mm_move_epi64): Use
+	__builtin_ia32_movq128.
+
+	* config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MOVQ128.
+	(bdesc_args): Add IX86_BUILTIN_MOVQ128.
+
+	* config/i386/sse.md (sse2_movq128): New.
+
+	* doc/extend.texi: Document __builtin_ia32_movq128.
+
 2008-08-07  Richard Guenther  <rguenther@suse.de>
 
 	PR middle-end/37042
diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h
index 933dcd6..c6590dc 100644
--- a/gcc/config/i386/emmintrin.h
+++ b/gcc/config/i386/emmintrin.h
@@ -726,7 +726,7 @@ _mm_movpi64_epi64 (__m64 __A)
 extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_move_epi64 (__m128i __A)
 {
-  return _mm_set_epi64 ((__m64)0LL, _mm_movepi64_pi64 (__A));
+  return (__m128i)__builtin_ia32_movq128 ((__v2di) __A);
 }
 
 /* Create a vector of zeros.  */
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 3ebe262..e6499fa 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -18729,6 +18729,8 @@ enum ix86_builtins
   IX86_BUILTIN_MOVNTPD,
   IX86_BUILTIN_MOVNTDQ,
 
+  IX86_BUILTIN_MOVQ128,
+
   /* SSE2 MMX */
   IX86_BUILTIN_MASKMOVDQU,
   IX86_BUILTIN_MOVMSKPD,
@@ -19858,6 +19860,8 @@ static const struct builtin_description bdesc_args[] =
   { OPTION_MASK_ISA_SSE2, CODE_FOR_abstf2, 0, IX86_BUILTIN_FABSQ, UNKNOWN, (int) FLOAT128_FTYPE_FLOAT128 },
   { OPTION_MASK_ISA_SSE2, CODE_FOR_copysigntf3, 0, IX86_BUILTIN_COPYSIGNQ, UNKNOWN, (int) FLOAT128_FTYPE_FLOAT128_FLOAT128 },
 
+  { OPTION_MASK_ISA_SSE, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI },
+
   /* SSE2 MMX */
   { OPTION_MASK_ISA_SSE2, CODE_FOR_mmx_addv1di3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI },
   { OPTION_MASK_ISA_SSE2, CODE_FOR_mmx_subv1di3, "__builtin_ia32_psubq", IX86_BUILTIN_PSUBQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI },
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index baa9976..1d0ae86 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -210,6 +210,18 @@
   DONE;
 })
 
+(define_insn "sse2_movq128"
+  [(set (match_operand:V2DI 0 "register_operand" "=x")
+	(vec_concat:V2DI
+	  (vec_select:DI
+	    (match_operand:V2DI 1 "nonimmediate_operand" "xm")
+	    (parallel [(const_int 0)]))
+	  (const_int 0)))]
+  "TARGET_SSE2"
+  "movq\t{%1, %0|%0, %1}"
+  [(set_attr "type" "ssemov")
+   (set_attr "mode" "TI")])
+
 (define_insn "<sse>_movup<ssemodesuffixf2c>"
   [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m")
 	(unspec:SSEMODEF2P
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 9557ba3..66fb840 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -8071,6 +8071,7 @@ v2di __builtin_ia32_psrlqi128 (v2di, int)
 v8hi __builtin_ia32_psrawi128 (v8hi, int)
 v4si __builtin_ia32_psradi128 (v4si, int)
 v4si __builtin_ia32_pmaddwd128 (v8hi, v8hi)
+v2di __builtin_ia32_movq128 (v2di)
 @end smallexample
 
 The following built-in functions are available when @option{-msse3} is used.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 19032ca..417b6b7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2008-08-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/36992
+	* gcc.target/i386/pr36992-1.c: Scan movq.
+	* gcc.target/i386/pr36992-2.c: Use "-O2 -msse4" instead of
+	"-O0 -msse2".  Scan movq.
+
 2008-08-07  Richard Guenther  <rguenther@suse.de>
 
 	PR middle-end/37042
@@ -5,15 +12,15 @@
 
 2008-08-07  Andreas Krebbel  <krebbel1@de.ibm.com>
 
- 	* gcc.c-torture/compile/20080806-1.c: Move testcase ...
+	* gcc.c-torture/compile/20080806-1.c: Move testcase ...
 	* gcc.target/s390/20080806-1.c: ... to here.
 
 2008-08-06  Douglas Gregor  <doug.gregor@gmail.com>
 
-       PR c++/36460
-       * g++.dg/cpp0x/bracket3.C: Add another test case for the >>
-       warning under -Wc++0x-compat.
-       * g++.dg/cpp0x/bracket4.C: Add testcase for PR c++/36460.
+	PR c++/36460
+	* g++.dg/cpp0x/bracket3.C: Add another test case for the >>
+	warning under -Wc++0x-compat.
+	* g++.dg/cpp0x/bracket4.C: Add testcase for PR c++/36460.
 
 2008-08-06  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
diff --git a/gcc/testsuite/gcc.target/i386/pr36992-1.c b/gcc/testsuite/gcc.target/i386/pr36992-1.c
index aad6f7c..7cd24cc 100644
--- a/gcc/testsuite/gcc.target/i386/pr36992-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr36992-1.c
@@ -9,4 +9,4 @@ test (__m128i b)
   return _mm_move_epi64 (b);
 }
 
-/* { dg-final { scan-assembler-times "mov\[qd\]\[ \\t\]+.*%xmm" 1 } } */
+/* { dg-final { scan-assembler-times "movq\[ \\t\]+.*%xmm" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr36992-2.c b/gcc/testsuite/gcc.target/i386/pr36992-2.c
index eb9c3a2..17696a5 100644
--- a/gcc/testsuite/gcc.target/i386/pr36992-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr36992-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile }
-/* { dg-options "-O0 -msse2" } */
+/* { dg-options "-O2 -msse4" } */
 
 #include <emmintrin.h>
 
@@ -9,4 +9,4 @@ test (__m128i b)
   return _mm_move_epi64 (b);
 }
 
-/* { dg-final { scan-assembler-not "%mm" } } */
+/* { dg-final { scan-assembler-times "movq\[ \\t\]+.*%xmm" 1 } } */