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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2023-03-14 09:51:38 +0000 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2023-03-14 09:53:17 +0000 |
| commit | b109964ddb421cf481828a2f3465751a2bd6a8f6 (patch) | |
| tree | a5bb8295fe89bd319f620a80075c28be0efc8761 /gcc | |
| parent | 72b52751c60abb327c73716259485d04b8eabe4f (diff) | |
| download | gcc-b109964ddb421cf481828a2f3465751a2bd6a8f6.zip gcc-b109964ddb421cf481828a2f3465751a2bd6a8f6.tar.gz gcc-b109964ddb421cf481828a2f3465751a2bd6a8f6.tar.bz2 | |
ifcvt: Lower bitfields only if suitable for scalar register [PR 109005]
This patch fixes the condition check for eligilibity of lowering bitfields,
where before we would check for non-BLKmode types, in the hope of excluding
unsuitable aggregate types, we now check directly the representative is not an
aggregate type, i.e. suitable for a scalar register.
gcc/ChangeLog:
PR tree-optimization/109005
* tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
aggregate type check.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/tree-if-conv.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/tree-if-conv.cc b/gcc/tree-if-conv.cc index f133102..ca1abd8 100644 --- a/gcc/tree-if-conv.cc +++ b/gcc/tree-if-conv.cc @@ -3317,9 +3317,9 @@ get_bitfield_rep (gassign *stmt, bool write, tree *bitpos, tree field_decl = TREE_OPERAND (comp_ref, 1); tree rep_decl = DECL_BIT_FIELD_REPRESENTATIVE (field_decl); - /* Bail out if the representative is BLKmode as we will not be able to - vectorize this. */ - if (TYPE_MODE (TREE_TYPE (rep_decl)) == E_BLKmode) + /* Bail out if the representative is not a suitable type for a scalar + register variable. */ + if (!is_gimple_reg_type (TREE_TYPE (rep_decl))) return NULL_TREE; /* Bail out if the DECL_SIZE of the field_decl isn't the same as the BF's |