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author | Jiong Wang <jiong.wang@arm.com> | 2016-05-12 17:00:52 +0000 |
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committer | Jiong Wang <jiwang@gcc.gnu.org> | 2016-05-12 17:00:52 +0000 |
commit | ada2eb687fd49e37664b92a59dbed55f19e62eb8 (patch) | |
tree | 1f0bc42a2d9246e4039ee13e03ae965bcc2d9e23 /gcc | |
parent | 4f2e1536a349a98cc4840fc90a4b97fc4fbc3467 (diff) | |
download | gcc-ada2eb687fd49e37664b92a59dbed55f19e62eb8.zip gcc-ada2eb687fd49e37664b92a59dbed55f19e62eb8.tar.gz gcc-ada2eb687fd49e37664b92a59dbed55f19e62eb8.tar.bz2 |
[LRA] PR70904, relax the restriction on subreg reload for wide mode
2016-05-12 Jiong Wang <jiong.wang@arm.com>
gcc/
PR rtl-optimization/70904
* lra-constraint.c (process_addr_reg): Relax the restriction on
subreg reload for wide mode.
From-SVN: r236181
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/lra-constraints.c | 16 |
2 files changed, 21 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index de20f4b..b9a18e8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-05-12 Jiong Wang <jiong.wang@arm.com> + + PR rtl-optimization/70904 + * lra-constraint.c (process_addr_reg): Relax the restriction on subreg + reload for wide mode. + 2016-05-12 Marek Polacek <polacek@redhat.com> PR c/70756 diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 14d5f1d..56ab5b4 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1307,7 +1307,21 @@ process_addr_reg (rtx *loc, bool check_only_p, rtx_insn **before, rtx_insn **aft subreg_p = GET_CODE (*loc) == SUBREG; if (subreg_p) - loc = &SUBREG_REG (*loc); + { + reg = SUBREG_REG (*loc); + mode = GET_MODE (reg); + + /* For mode with size bigger than ptr_mode, there unlikely to be "mov" + between two registers with different classes, but there normally will + be "mov" which transfers element of vector register into the general + register, and this normally will be a subreg which should be reloaded + as a whole. This is particularly likely to be triggered when + -fno-split-wide-types specified. */ + if (in_class_p (reg, cl, &new_class) + || GET_MODE_SIZE (mode) <= GET_MODE_SIZE (ptr_mode)) + loc = &SUBREG_REG (*loc); + } + reg = *loc; mode = GET_MODE (reg); if (! REG_P (reg)) |