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| author | Richard Henderson <rth@redhat.com> | 2004-01-15 01:51:19 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2004-01-15 01:51:19 -0800 |
| commit | ad5d827dc7bda0ead4557d5a10905613f1bf2e2b (patch) | |
| tree | b2e1388889079edc93e054329e3a7832419297fa /gcc | |
| parent | 66e07510bbbbecfc673b3a3e6612eccf97b1dabd (diff) | |
| download | gcc-ad5d827dc7bda0ead4557d5a10905613f1bf2e2b.zip gcc-ad5d827dc7bda0ead4557d5a10905613f1bf2e2b.tar.gz gcc-ad5d827dc7bda0ead4557d5a10905613f1bf2e2b.tar.bz2 | |
alpha.h (REG_ALLOC_ORDER): Reorder fp regs after integer regs of the same call-savedness.
* config/alpha/alpha.h (REG_ALLOC_ORDER): Reorder fp regs after
integer regs of the same call-savedness.
From-SVN: r75911
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.h | 62 |
2 files changed, 29 insertions, 38 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4ff092a..abafe89 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-01-15 Richard Henderson <rth@redhat.com> + + * config/alpha/alpha.h (REG_ALLOC_ORDER): Reorder fp regs after + integer regs of the same call-savedness. + 2004-01-15 Andreas Schwab <schwab@suse.de> PR bootstrap/13562 diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 78dbd10..0eeb9de 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -579,44 +579,30 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } /* List the order in which to allocate registers. Each register must be - listed once, even those in FIXED_REGISTERS. - - We allocate in the following order: - $f10-$f15 (nonsaved floating-point register) - $f22-$f30 (likewise) - $f21-$f16 (likewise, but input args) - $f0 (nonsaved, but return value) - $f1 (nonsaved, but immediate before saved) - $f2-$f9 (saved floating-point registers) - $1-$8 (nonsaved integer registers) - $22-$25 (likewise) - $28 (likewise) - $0 (likewise, but return value) - $21-$16 (likewise, but input args) - $27 (procedure value in OSF, nonsaved in NT) - $9-$14 (saved integer registers) - $26 (return PC) - $15 (frame pointer) - $29 (global pointer) - $30, $31, $f31 (stack pointer and always zero/ap & fp) */ - -#define REG_ALLOC_ORDER \ - {42, 43, 44, 45, 46, 47, \ - 54, 55, 56, 57, 58, 59, 60, 61, 62, \ - 53, 52, 51, 50, 49, 48, \ - 32, 33, \ - 34, 35, 36, 37, 38, 39, 40, 41, \ - 1, 2, 3, 4, 5, 6, 7, 8, \ - 22, 23, 24, 25, \ - 28, \ - 0, \ - 21, 20, 19, 18, 17, 16, \ - 27, \ - 9, 10, 11, 12, 13, 14, \ - 26, \ - 15, \ - 29, \ - 30, 31, 63 } + listed once, even those in FIXED_REGISTERS. */ + +#define REG_ALLOC_ORDER { \ + 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \ + 22, 23, 24, 25, 28, /* likewise */ \ + 0, /* likewise, but return value */ \ + 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \ + 27, /* likewise, but OSF procedure value */ \ + \ + 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \ + 54, 55, 56, 57, 58, 59, /* likewise */ \ + 60, 61, 62, /* likewise */ \ + 32, 33, /* likewise, but return values */ \ + 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \ + \ + 9, 10, 11, 12, 13, 14, /* saved integer registers */ \ + 26, /* return address */ \ + 15, /* hard frame pointer */ \ + \ + 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \ + 40, 41, /* likewise */ \ + \ + 29, 30, 31, 63 /* gp, sp, ap, sfp */ \ +} /* Return number of consecutive hard regs needed starting at reg REGNO to hold something of mode MODE. |