invoke.texi: Document new MIPS -msym32 and -mno-sym32 options.

	* doc/invoke.texi: Document new MIPS -msym32 and -mno-sym32 options.
	* config/mips/mips.h (MASK_SYM32, TARGET_SYM32): New macros.
	(TARGET_SWITCHES): Add -msym32 and -mno-sym32.
	(ABI_HAS_64BIT_SYMBOLS): Set to false if TARGET_SYM32.
	(ASM_SPEC): Pass down -msym32 and -mno-sym32.

From-SVN: r95926

3 files changed, 26 insertions, 2 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 22615e1..bd96cf9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2005-03-05  Richard Sandiford  <rsandifo@redhat.com>
+
+	* doc/invoke.texi: Document new MIPS -msym32 and -mno-sym32 options.
+	* config/mips/mips.h (MASK_SYM32, TARGET_SYM32): New macros.
+	(TARGET_SWITCHES): Add -msym32 and -mno-sym32.
+	(ABI_HAS_64BIT_SYMBOLS): Set to false if TARGET_SYM32.
+	(ASM_SPEC): Pass down -msym32 and -mno-sym32.
+
 2005-03-04  Devang Patel  <dpatel@apple.com>
 	
 	PR tree-optimization/18815
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 559efb9..41328a3 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -164,6 +164,7 @@ extern const struct mips_cpu_info *mips_tune_info;
                                            break instead of trap. */
 #define MASK_PAIRED_SINGLE 0x10000000   /* Support paired-single FPU.  */
 #define MASK_MIPS3D        0x20000000   /* Support MIPS-3D instructions.  */
+#define MASK_SYM32	   0x40000000	/* Assume 32-bit symbol values.  */
 
 					/* Debug switches, not documented */
 #define MASK_DEBUG	0		/* unused */
@@ -242,6 +243,7 @@ extern const struct mips_cpu_info *mips_tune_info;
 #define TARGET_PAIRED_SINGLE_FLOAT	\
 				((target_flags & MASK_PAIRED_SINGLE) != 0)
 #define TARGET_MIPS3D		((target_flags & MASK_MIPS3D) != 0)
+#define TARGET_SYM32		((target_flags & MASK_SYM32) != 0)
 
 /* True if we should use NewABI-style relocation operators for
    symbolic addresses.  This is never true for mips16 code,
@@ -669,6 +671,10 @@ extern const struct mips_cpu_info *mips_tune_info;
      N_("FP exceptions are enabled") },					\
   {"no-fp-exceptions", 	  -MASK_FP_EXCEPTIONS,				\
      N_("FP exceptions are not enabled") },				\
+  {"sym32",		  MASK_SYM32,					\
+     N_("Assume all symbols have 32-bit values") },			\
+  {"no-sym32",		  -MASK_SYM32,					\
+     N_("Don't assume all symbols have 32-bit values") },		\
   {"debug",		  MASK_DEBUG,					\
      NULL},								\
   {"debugd",		  MASK_DEBUG_D,					\
@@ -843,7 +849,7 @@ extern const struct mips_cpu_info *mips_tune_info;
 
 /* True if symbols are 64 bits wide.  At present, n64 is the only
    ABI for which this is true.  */
-#define ABI_HAS_64BIT_SYMBOLS	(mips_abi == ABI_64)
+#define ABI_HAS_64BIT_SYMBOLS	(mips_abi == ABI_64 && !TARGET_SYM32)
 
 /* ISA has instructions for managing 64 bit fp and gp regs (e.g. mips3).  */
 #define ISA_HAS_64BIT_REGS	(ISA_MIPS3				\
@@ -1093,6 +1099,7 @@ extern const struct mips_cpu_info *mips_tune_info;
 %(subtarget_asm_debugging_spec) \
 %{mabi=*} %{!mabi*: %(asm_abi_default_spec)} \
 %{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \
+%{msym32} %{mno-sym32} \
 %{mtune=*} %{v} \
 %(subtarget_asm_spec)"
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 7b6bda9..d40806a 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -548,7 +548,7 @@ Objective-C and Objective-C++ Dialects}.
 -mxgot  -mno-xgot  -mgp32  -mgp64  -mfp32  -mfp64 @gol
 -mhard-float  -msoft-float  -msingle-float  -mdouble-float @gol
 -mpaired-single  -mips3d @gol
--mint64  -mlong64  -mlong32 @gol
+-mint64  -mlong64  -mlong32  -msym32  -mno-sym32 @gol
 -G@var{num}  -membedded-data  -mno-embedded-data @gol
 -muninit-const-in-rodata  -mno-uninit-const-in-rodata @gol
 -msplit-addresses  -mno-split-addresses  @gol
@@ -9679,6 +9679,15 @@ uses 64-bit @code{long}s, as does the 64-bit EABI; the others use
 32-bit @code{long}s.  Pointers are the same size as @code{long}s,
 or the same size as integer registers, whichever is smaller.
 
+@item -msym32
+@itemx -mno-sym32
+@opindex msym32
+@opindex mno-sym32
+Assume (do not assume) that all symbols have 32-bit values, regardless
+of the selected ABI@.  This option is useful in combination with
+@option{-mabi=64} and @option{-mno-abicalls} because it allows GCC
+to generate shorter and faster references to symbolic addresses.
+
 @item -G @var{num}
 @opindex G
 @cindex smaller data references (MIPS)