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authorPaul A. Clarke <pc@us.ibm.com>2021-06-29 09:18:55 -0500
committerPaul A. Clarke <pc@us.ibm.com>2021-07-13 13:46:34 -0500
commitacd4b9103c1a30c833de4eee31fb69c3ff13cd77 (patch)
tree021169b667d8d93e99c5bb5df13d0450e0d2df1b /gcc
parent4d3eaeb4f505b0838c673ee28e7dba8687fc8272 (diff)
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rs6000: Add support for SSE4.1 "test" intrinsics
2021-07-13 Paul A. Clarke <pc@us.ibm.com> gcc * config/rs6000/smmintrin.h (_mm_testz_si128, _mm_testc_si128, _mm_testnzc_si128, _mm_test_all_ones, _mm_test_all_zeros, _mm_test_mix_ones_zeros): New.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/rs6000/smmintrin.h56
1 files changed, 56 insertions, 0 deletions
diff --git a/gcc/config/rs6000/smmintrin.h b/gcc/config/rs6000/smmintrin.h
index bdf6eb3..16fd34d 100644
--- a/gcc/config/rs6000/smmintrin.h
+++ b/gcc/config/rs6000/smmintrin.h
@@ -116,4 +116,60 @@ _mm_blendv_epi8 (__m128i __A, __m128i __B, __m128i __mask)
return (__m128i) vec_sel ((__v16qu) __A, (__v16qu) __B, __lmask);
}
+__inline int
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testz_si128 (__m128i __A, __m128i __B)
+{
+ /* Note: This implementation does NOT set "zero" or "carry" flags. */
+ const __v16qu __zero = {0};
+ return vec_all_eq (vec_and ((__v16qu) __A, (__v16qu) __B), __zero);
+}
+
+__inline int
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testc_si128 (__m128i __A, __m128i __B)
+{
+ /* Note: This implementation does NOT set "zero" or "carry" flags. */
+ const __v16qu __zero = {0};
+ const __v16qu __notA = vec_nor ((__v16qu) __A, (__v16qu) __A);
+ return vec_all_eq (vec_and ((__v16qu) __notA, (__v16qu) __B), __zero);
+}
+
+__inline int
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_testnzc_si128 (__m128i __A, __m128i __B)
+{
+ /* Note: This implementation does NOT set "zero" or "carry" flags. */
+ return _mm_testz_si128 (__A, __B) == 0 && _mm_testc_si128 (__A, __B) == 0;
+}
+
+__inline int
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_test_all_zeros (__m128i __A, __m128i __mask)
+{
+ const __v16qu __zero = {0};
+ return vec_all_eq (vec_and ((__v16qu) __A, (__v16qu) __mask), __zero);
+}
+
+__inline int
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_test_all_ones (__m128i __A)
+{
+ const __v16qu __ones = vec_splats ((unsigned char) 0xff);
+ return vec_all_eq ((__v16qu) __A, __ones);
+}
+
+__inline int
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_test_mix_ones_zeros (__m128i __A, __m128i __mask)
+{
+ const __v16qu __zero = {0};
+ const __v16qu __Amasked = vec_and ((__v16qu) __A, (__v16qu) __mask);
+ const int any_ones = vec_any_ne (__Amasked, __zero);
+ const __v16qu __notA = vec_nor ((__v16qu) __A, (__v16qu) __A);
+ const __v16qu __notAmasked = vec_and ((__v16qu) __notA, (__v16qu) __mask);
+ const int any_zeros = vec_any_ne (__notAmasked, __zero);
+ return any_ones * any_zeros;
+}
+
#endif