aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorJakub Jelinek <jakub@redhat.com>2017-06-21 22:02:00 +0200
committerJakub Jelinek <jakub@gcc.gnu.org>2017-06-21 22:02:00 +0200
commitac135a731d319ec86562f7ff4a42453df3078836 (patch)
tree74d60e6f1a53a22f0057049c7905ae3447bc8de1 /gcc
parent5e88d2d08d464d80bbe5dfd64db954f2dd516b7e (diff)
downloadgcc-ac135a731d319ec86562f7ff4a42453df3078836.zip
gcc-ac135a731d319ec86562f7ff4a42453df3078836.tar.gz
gcc-ac135a731d319ec86562f7ff4a42453df3078836.tar.bz2
re PR target/81151 (-Wmaybe-uninitialized in insn-emit.c)
PR target/81151 * config/i386/sse.md (round<mode>2): Renumber match_dup and operands indexes to avoid gap between operands and match_dups. From-SVN: r249469
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/i386/sse.md14
2 files changed, 13 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ea97b0b..d40f0c8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-06-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/81151
+ * config/i386/sse.md (round<mode>2): Renumber match_dup and
+ operands indexes to avoid gap between operands and match_dups.
+
2017-06-21 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cost-tables.h (thunderx_extra_costs):
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 29a039d..f61ae2b 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -15638,13 +15638,13 @@
(set_attr "mode" "<MODE>")])
(define_expand "round<mode>2"
- [(set (match_dup 4)
+ [(set (match_dup 3)
(plus:VF
(match_operand:VF 1 "register_operand")
- (match_dup 3)))
+ (match_dup 2)))
(set (match_operand:VF 0 "register_operand")
(unspec:VF
- [(match_dup 4) (match_dup 5)]
+ [(match_dup 3) (match_dup 4)]
UNSPEC_ROUND))]
"TARGET_ROUND && !flag_trapping_math"
{
@@ -15664,11 +15664,11 @@
vec_half = ix86_build_const_vector (<MODE>mode, true, half);
vec_half = force_reg (<MODE>mode, vec_half);
- operands[3] = gen_reg_rtx (<MODE>mode);
- emit_insn (gen_copysign<mode>3 (operands[3], vec_half, operands[1]));
+ operands[2] = gen_reg_rtx (<MODE>mode);
+ emit_insn (gen_copysign<mode>3 (operands[2], vec_half, operands[1]));
- operands[4] = gen_reg_rtx (<MODE>mode);
- operands[5] = GEN_INT (ROUND_TRUNC);
+ operands[3] = gen_reg_rtx (<MODE>mode);
+ operands[4] = GEN_INT (ROUND_TRUNC);
})
(define_expand "round<mode>2_sfix"