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| author | Sameera Deshpande <sameera.deshpande@arm.com> | 2012-07-20 22:37:33 +0530 |
|---|---|---|
| committer | Greta Yorsh <gretay@gcc.gnu.org> | 2012-07-20 18:07:33 +0100 |
| commit | ab3dfff71d064f29aee8216dddcc8b463554df8b (patch) | |
| tree | 4cc344054f0d152250223615c1d1e3d49763254c /gcc | |
| parent | 3ebc22c1e408911d3feef73ba8b5a1e2ba489fbb (diff) | |
| download | gcc-ab3dfff71d064f29aee8216dddcc8b463554df8b.zip gcc-ab3dfff71d064f29aee8216dddcc8b463554df8b.tar.gz gcc-ab3dfff71d064f29aee8216dddcc8b463554df8b.tar.bz2 | |
arm-protos.h (tune_params): Add prefer_ldrd_strd.
gcc/
2012-07-20 Sameera Deshpande <sameera.deshpande@arm.com>
Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm-protos.h (tune_params): Add prefer_ldrd_strd.
* config/arm/arm.c (arm_slowmul_tune): Initialize it.
(arm_fastmul_tune, arm_strongarm_tune): Likewise.
(arm_xscale_tune, arm_9e_tune, arm_v6t2_tune): Likewise.
(arm_cortex_tune, arm_cortex_a5_tune, arm_cortex_a9_tune): Likewise.
(arm_fa726te_tune): Likewise.
Co-Authored-By: Greta Yorsh <greta.yorsh@arm.com>
From-SVN: r189722
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/arm/arm-protos.h | 2 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 30 |
3 files changed, 32 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 79a9ec7..ca05268 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2012-07-20 Sameera Deshpande <sameera.deshpande@arm.com> + Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm-protos.h (tune_params): Add prefer_ldrd_strd. + * config/arm/arm.c (arm_slowmul_tune): Initialize it. + (arm_fastmul_tune, arm_strongarm_tune): Likewise. + (arm_xscale_tune, arm_9e_tune, arm_v6t2_tune): Likewise. + (arm_cortex_tune, arm_cortex_a5_tune, arm_cortex_a9_tune): Likewise. + (arm_fa726te_tune): Likewise. + 2012-07-20 Richard Guenther <rguenther@suse.de> * tree-dfa.c (collect_dfa_stats): Simplify. diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index eb77b72..c590ef4 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -238,6 +238,8 @@ struct tune_params int l1_cache_line_size; bool prefer_constant_pool; int (*branch_cost) (bool, bool); + /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM. */ + bool prefer_ldrd_strd; }; extern const struct tune_params *current_tune; diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index ff46dd9..d463caf 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -875,7 +875,8 @@ const struct tune_params arm_slowmul_tune = 5, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, true, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; const struct tune_params arm_fastmul_tune = @@ -886,7 +887,8 @@ const struct tune_params arm_fastmul_tune = 5, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, true, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; /* StrongARM has early execution of branches, so a sequence that is worth @@ -900,7 +902,8 @@ const struct tune_params arm_strongarm_tune = 3, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, true, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; const struct tune_params arm_xscale_tune = @@ -911,7 +914,8 @@ const struct tune_params arm_xscale_tune = 3, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, true, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; const struct tune_params arm_9e_tune = @@ -922,7 +926,8 @@ const struct tune_params arm_9e_tune = 5, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, true, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; const struct tune_params arm_v6t2_tune = @@ -933,7 +938,8 @@ const struct tune_params arm_v6t2_tune = 5, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, false, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; /* Generic Cortex tuning. Use more specific tunings if appropriate. */ @@ -945,7 +951,8 @@ const struct tune_params arm_cortex_tune = 5, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, false, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; /* Branches can be dual-issued on Cortex-A5, so conditional execution is @@ -959,7 +966,8 @@ const struct tune_params arm_cortex_a5_tune = 1, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, false, /* Prefer constant pool. */ - arm_cortex_a5_branch_cost + arm_cortex_a5_branch_cost, + false /* Prefer LDRD/STRD. */ }; const struct tune_params arm_cortex_a9_tune = @@ -970,7 +978,8 @@ const struct tune_params arm_cortex_a9_tune = 5, /* Max cond insns. */ ARM_PREFETCH_BENEFICIAL(4,32,32), false, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; const struct tune_params arm_fa726te_tune = @@ -981,7 +990,8 @@ const struct tune_params arm_fa726te_tune = 5, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, true, /* Prefer constant pool. */ - arm_default_branch_cost + arm_default_branch_cost, + false /* Prefer LDRD/STRD. */ }; |