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authorBernd Schmidt <bernds@codesourcery.com>2011-09-27 17:23:27 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2011-09-27 17:23:27 +0000
commita744996112debc8f21fc2770dfb001059e01d2e1 (patch)
tree0e9492fa9f4499ac207075f8804fec032fc0aae2 /gcc
parent58ac64596ae0fecfe67e0bb27688eb3cddc67bde (diff)
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mips.c (mips_add_cfa_restore): New function.
gcc/ 2011-09-25 Bernd Schmidt <bernds@codesourcery.com> Richard Sandiford <rdsandiford@googlemail.com> * config/mips/mips.c (mips_add_cfa_restore): New function. (mips16e_save_restore_reg): Use it. (mips_restore_reg): Likewise. Split double FPRs for REG_CFA_RESTORE notes. Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com> From-SVN: r179286
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/config/mips/mips.c20
2 files changed, 24 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5858138..d05ebc6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2011-09-27 Bernd Schmidt <bernds@codesourcery.com>
+ Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.c (mips_add_cfa_restore): New function.
+ (mips16e_save_restore_reg): Use it.
+ (mips_restore_reg): Likewise. Split double FPRs for
+ REG_CFA_RESTORE notes.
+
2011-09-27 Richard Sandiford <rdsandiford@googlemail.com>
PR middle-end/50386
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 22cb60b..d0b6b4c 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -8202,6 +8202,15 @@ mips_frame_set (rtx mem, rtx reg)
return set;
}
+
+/* Record that the epilogue has restored call-saved register REG. */
+
+static void
+mips_add_cfa_restore (rtx reg)
+{
+ mips_epilogue.cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
+ mips_epilogue.cfa_restores);
+}
/* If a MIPS16e SAVE or RESTORE instruction saves or restores register
mips16e_s2_s8_regs[X], it must also save the registers in indexes
@@ -8393,8 +8402,7 @@ mips16e_save_restore_reg (bool restore_p, bool reg_parm_p,
reg = gen_rtx_REG (SImode, regno);
if (restore_p)
{
- mips_epilogue.cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
- mips_epilogue.cfa_restores);
+ mips_add_cfa_restore (reg);
return gen_rtx_SET (VOIDmode, reg, mem);
}
if (reg_parm_p)
@@ -10290,9 +10298,13 @@ mips_restore_reg (rtx reg, rtx mem)
$7 instead and adjust the return insn appropriately. */
if (TARGET_MIPS16 && REGNO (reg) == RETURN_ADDR_REGNUM)
reg = gen_rtx_REG (GET_MODE (reg), GP_REG_FIRST + 7);
+ else if (GET_MODE (reg) == DFmode && !TARGET_FLOAT64)
+ {
+ mips_add_cfa_restore (mips_subword (reg, true));
+ mips_add_cfa_restore (mips_subword (reg, false));
+ }
else
- mips_epilogue.cfa_restores = alloc_reg_note (REG_CFA_RESTORE, reg,
- mips_epilogue.cfa_restores);
+ mips_add_cfa_restore (reg);
mips_emit_save_slot_move (reg, mem, MIPS_EPILOGUE_TEMP (GET_MODE (reg)));
if (REGNO (reg) == REGNO (mips_epilogue.cfa_reg))