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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2016-01-20 01:56:39 +0000 |
|---|---|---|
| committer | Thomas Preud'homme <thopre01@gcc.gnu.org> | 2016-01-20 01:56:39 +0000 |
| commit | a3f69631af2a64405722a526650b96fbcf9a9373 (patch) | |
| tree | 71be16552615b933a7f9886ebe458a0ed61c5cf6 /gcc | |
| parent | 74ba78f51a6d96d070d88c36730993ee7c9639a6 (diff) | |
| download | gcc-a3f69631af2a64405722a526650b96fbcf9a9373.zip gcc-a3f69631af2a64405722a526650b96fbcf9a9373.tar.gz gcc-a3f69631af2a64405722a526650b96fbcf9a9373.tar.bz2 | |
memset-inline-10.c: Added dg-require-effective-target arm_thumb2_ok.
2016-01-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
gcc/testsuite/
* gcc.target/arm/memset-inline-10.c: Added
dg-require-effective-target arm_thumb2_ok.
From-SVN: r232600
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/memset-inline-10.c | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 065c7a8..63baf4e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-01-20 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * gcc.target/arm/memset-inline-10.c: Added + dg-require-effective-target arm_thumb2_ok. + 2016-01-19 Eric Botcazou <ebotcazou@adacore.com> * gcc.dg/debug/dwarf2/sso.c: New test. diff --git a/gcc/testsuite/gcc.target/arm/memset-inline-10.c b/gcc/testsuite/gcc.target/arm/memset-inline-10.c index c1087c8..ce51c1d 100644 --- a/gcc/testsuite/gcc.target/arm/memset-inline-10.c +++ b/gcc/testsuite/gcc.target/arm/memset-inline-10.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_thumb2_ok } */ /* { dg-options "-march=armv7-a -mfloat-abi=hard -mfpu=neon -O2" } */ /* { dg-skip-if "need SIMD instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */ /* { dg-skip-if "need SIMD instructions" { *-*-* } { "-mfpu=vfp*" } { "" } } */ |